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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc25497 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25499 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25530 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25532 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25534 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25566 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25568 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25584 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25586 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25588 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25676 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25677 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25678 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25691 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25692 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25693 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25713 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25715 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25717 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25745 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25747 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25749 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25801 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25802 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25805 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25837 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25838 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25841 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25871 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25872 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25875 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25901 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25903 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25905 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25931 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25932 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25935 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25961 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25963 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25965 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25992 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25994 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25996 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26004 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
26020 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26022 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26024 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26054 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26056 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26058 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26068 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
26106 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26108 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26110 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26136 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26138 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26140 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26166 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26168 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26170 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26196 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26198 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26200 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26226 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26227 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26230 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26333 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26334 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26337 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26347 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26363 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26365 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26367 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26377 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26393 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26394 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26397 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26407 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26423 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26425 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26427 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26437 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26457 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26459 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26461 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26471 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26487 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26489 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26491 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26501 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
26517 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26519 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26521 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26531 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26547 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26549 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26551 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26561 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
26608 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26610 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26612 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26636 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26638 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26640 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26666 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26668 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26670 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26696 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26697 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26700 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26876 { 9558 /* vexp2pd */, X86::VEXP2PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26880 { 9558 /* vexp2pd */, X86::VEXP2PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26888 { 9566 /* vexp2ps */, X86::VEXP2PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26892 { 9566 /* vexp2ps */, X86::VEXP2PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26902 { 9574 /* vexpandpd */, X86::VEXPANDPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26904 { 9574 /* vexpandpd */, X86::VEXPANDPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26906 { 9574 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26920 { 9584 /* vexpandps */, X86::VEXPANDPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26922 { 9584 /* vexpandps */, X86::VEXPANDPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26924 { 9584 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28756 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28758 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28760 { 11075 /* vgetexppd */, X86::VGETEXPPDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28770 { 11075 /* vgetexppd */, X86::VGETEXPPDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
28786 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28788 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28790 { 11085 /* vgetexpps */, X86::VGETEXPPSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28800 { 11085 /* vgetexpps */, X86::VGETEXPPSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
29297 { 11525 /* vmovapd */, X86::VMOVAPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29299 { 11525 /* vmovapd */, X86::VMOVAPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29301 { 11525 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29338 { 11543 /* vmovaps */, X86::VMOVAPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29340 { 11543 /* vmovaps */, X86::VMOVAPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29342 { 11543 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29386 { 11567 /* vmovddup */, X86::VMOVDDUPZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29388 { 11567 /* vmovddup */, X86::VMOVDDUPZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29390 { 11567 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29415 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29417 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29419 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29448 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29450 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29452 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29489 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29491 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29493 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29522 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29524 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29526 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29555 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29557 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29559 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29588 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29590 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29592 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29693 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29695 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29697 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29715 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29717 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29719 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29757 { 11915 /* vmovupd */, X86::VMOVUPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29759 { 11915 /* vmovupd */, X86::VMOVUPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29761 { 11915 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29798 { 11933 /* vmovups */, X86::VMOVUPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29800 { 11933 /* vmovups */, X86::VMOVUPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29802 { 11933 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30031 { 12149 /* vpabsb */, X86::VPABSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30033 { 12149 /* vpabsb */, X86::VPABSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30035 { 12149 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30056 { 12156 /* vpabsd */, X86::VPABSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30058 { 12156 /* vpabsd */, X86::VPABSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30060 { 12156 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30083 { 12163 /* vpabsq */, X86::VPABSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30085 { 12163 /* vpabsq */, X86::VPABSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30087 { 12163 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30111 { 12170 /* vpabsw */, X86::VPABSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30113 { 12170 /* vpabsw */, X86::VPABSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30115 { 12170 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30720 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30721 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30723 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30724 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30726 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30727 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30751 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30752 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30754 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30755 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30757 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30758 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30788 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, },
30789 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30791 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, },
30792 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30794 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, },
30795 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30819 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30820 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30822 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30823 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30825 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30826 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31183 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31184 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31185 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31198 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31199 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31200 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31213 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31214 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31215 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31228 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31229 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31230 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31258 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31260 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31262 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31285 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31287 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31289 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31997 { 13137 /* vpexpandb */, X86::VPEXPANDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31999 { 13137 /* vpexpandb */, X86::VPEXPANDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32001 { 13137 /* vpexpandb */, X86::VPEXPANDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32015 { 13147 /* vpexpandd */, X86::VPEXPANDDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32017 { 13147 /* vpexpandd */, X86::VPEXPANDDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32019 { 13147 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32033 { 13157 /* vpexpandq */, X86::VPEXPANDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32035 { 13157 /* vpexpandq */, X86::VPEXPANDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32037 { 13157 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32051 { 13167 /* vpexpandw */, X86::VPEXPANDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32053 { 13167 /* vpexpandw */, X86::VPEXPANDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32055 { 13167 /* vpexpandw */, X86::VPEXPANDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32180 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32182 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32184 { 13488 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32207 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32209 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32211 { 13497 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32775 { 13838 /* vpmovdb */, X86::VPMOVDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32776 { 13838 /* vpmovdb */, X86::VPMOVDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32777 { 13838 /* vpmovdb */, X86::VPMOVDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32790 { 13846 /* vpmovdw */, X86::VPMOVDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32791 { 13846 /* vpmovdw */, X86::VPMOVDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32792 { 13846 /* vpmovdw */, X86::VPMOVDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32822 { 13909 /* vpmovqb */, X86::VPMOVQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32823 { 13909 /* vpmovqb */, X86::VPMOVQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32824 { 13909 /* vpmovqb */, X86::VPMOVQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32837 { 13917 /* vpmovqd */, X86::VPMOVQDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32838 { 13917 /* vpmovqd */, X86::VPMOVQDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32839 { 13917 /* vpmovqd */, X86::VPMOVQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32852 { 13925 /* vpmovqw */, X86::VPMOVQWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32853 { 13925 /* vpmovqw */, X86::VPMOVQWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32854 { 13925 /* vpmovqw */, X86::VPMOVQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32867 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32868 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32869 { 13933 /* vpmovsdb */, X86::VPMOVSDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32882 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32883 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32884 { 13942 /* vpmovsdw */, X86::VPMOVSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32897 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32898 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32899 { 13951 /* vpmovsqb */, X86::VPMOVSQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32912 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32913 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32914 { 13960 /* vpmovsqd */, X86::VPMOVSQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32927 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32928 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32929 { 13969 /* vpmovsqw */, X86::VPMOVSQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32942 { 13978 /* vpmovswb */, X86::VPMOVSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32943 { 13978 /* vpmovswb */, X86::VPMOVSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32944 { 13978 /* vpmovswb */, X86::VPMOVSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32961 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32963 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32965 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32983 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32985 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32987 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33005 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33007 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33009 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33027 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33029 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33031 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33049 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33051 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33053 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33071 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33073 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33075 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33089 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33090 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33091 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33104 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33105 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33106 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33119 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33120 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33121 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33134 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33135 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33136 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33149 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33150 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33151 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33164 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33165 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33166 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33182 { 14116 /* vpmovwb */, X86::VPMOVWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33183 { 14116 /* vpmovwb */, X86::VPMOVWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33184 { 14116 /* vpmovwb */, X86::VPMOVWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33201 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33203 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33205 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33223 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33225 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33227 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33245 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33247 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33249 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33267 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33269 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33271 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33289 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33291 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33293 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33311 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33313 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33315 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33564 { 14267 /* vpopcntb */, X86::VPOPCNTBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33566 { 14267 /* vpopcntb */, X86::VPOPCNTBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33568 { 14267 /* vpopcntb */, X86::VPOPCNTBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33585 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33587 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33589 { 14276 /* vpopcntd */, X86::VPOPCNTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33612 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33614 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33616 { 14285 /* vpopcntq */, X86::VPOPCNTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33636 { 14294 /* vpopcntw */, X86::VPOPCNTWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33638 { 14294 /* vpopcntw */, X86::VPOPCNTWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33640 { 14294 /* vpopcntw */, X86::VPOPCNTWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35807 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35809 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35811 { 15164 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35834 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35836 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35838 { 15173 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35868 { 15200 /* vrcp28pd */, X86::VRCP28PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35872 { 15200 /* vrcp28pd */, X86::VRCP28PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
35880 { 15209 /* vrcp28ps */, X86::VRCP28PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35884 { 15209 /* vrcp28ps */, X86::VRCP28PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
36089 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
36091 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
36093 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36116 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
36118 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
36120 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36150 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36154 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
36162 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36166 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
36440 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
36442 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
36444 { 15748 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36474 { 15756 /* vsqrtps */, X86::VSQRTPSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
36476 { 15756 /* vsqrtps */, X86::VSQRTPSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
36478 { 15756 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },