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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc27090 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27124 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27150 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27161 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27180 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27214 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27240 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27251 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27270 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27304 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27330 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27341 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27378 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27412 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27446 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27480 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27514 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27548 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27594 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27628 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27654 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27665 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27684 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27718 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27744 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27755 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27774 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27808 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27834 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27845 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27864 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27898 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27932 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27966 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28000 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28034 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28098 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28132 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28158 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28169 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28188 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28222 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28248 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28259 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28278 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28312 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28338 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28349 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28386 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28420 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28446 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28457 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28476 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28510 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28536 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28547 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28566 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28600 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28626 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28637 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },