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|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc22570 { 16 /* adc */, X86::ADC16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22574 { 16 /* adc */, X86::ADC32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22578 { 16 /* adc */, X86::ADC64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22582 { 16 /* adc */, X86::ADC8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22596 { 40 /* adcx */, X86::ADCX32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22598 { 40 /* adcx */, X86::ADCX64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22607 { 57 /* add */, X86::ADD16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22611 { 57 /* add */, X86::ADD32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22615 { 57 /* add */, X86::ADD64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22619 { 57 /* add */, X86::ADD8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22633 { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22635 { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22637 { 88 /* addsd */, X86::ADDSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22639 { 94 /* addss */, X86::ADDSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22641 { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22643 { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22645 { 123 /* adox */, X86::ADOX32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22647 { 123 /* adox */, X86::ADOX64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22649 { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22651 { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22653 { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22655 { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22668 { 199 /* and */, X86::AND16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22672 { 199 /* and */, X86::AND32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22676 { 199 /* and */, X86::AND64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22680 { 199 /* and */, X86::AND8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22698 { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22700 { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22702 { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22704 { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22740 { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22742 { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
22744 { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22746 { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
22817 { 643 /* btc */, X86::BTC16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22819 { 643 /* btc */, X86::BTC32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22821 { 643 /* btc */, X86::BTC64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22829 { 670 /* btr */, X86::BTR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22831 { 670 /* btr */, X86::BTR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22833 { 670 /* btr */, X86::BTR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22841 { 689 /* bts */, X86::BTS16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22843 { 689 /* bts */, X86::BTS32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22845 { 689 /* bts */, X86::BTS64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23055 { 1519 /* crc32 */, X86::CRC32r32r16, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR16 }, },
23056 { 1519 /* crc32 */, X86::CRC32r32r32, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23057 { 1519 /* crc32 */, X86::CRC32r32r8, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR8 }, },
23061 { 1519 /* crc32 */, X86::CRC32r64r64, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23062 { 1519 /* crc32 */, X86::CRC32r64r8, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR8 }, },
23078 { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
23090 { 1675 /* cvtsd2ss */, X86::CVTSD2SSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23092 { 1684 /* cvtsi2sd */, X86::CVTSI2SDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
23093 { 1684 /* cvtsi2sd */, X86::CVTSI642SDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
23096 { 1713 /* cvtsi2ss */, X86::CVTSI2SSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
23097 { 1713 /* cvtsi2ss */, X86::CVTSI642SSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
23100 { 1742 /* cvtss2sd */, X86::CVTSS2SDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23153 { 1956 /* divpd */, X86::DIVPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23155 { 1962 /* divps */, X86::DIVPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23157 { 1973 /* divsd */, X86::DIVSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23159 { 1979 /* divss */, X86::DIVSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23182 { 2076 /* extrq */, X86::EXTRQ, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23384 { 3060 /* gf2p8mulb */, X86::GF2P8MULBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23387 { 3073 /* haddpd */, X86::HADDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23389 { 3080 /* haddps */, X86::HADDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23392 { 3091 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23394 { 3098 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23420 { 3134 /* imul */, X86::IMUL16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23424 { 3134 /* imul */, X86::IMUL32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23428 { 3134 /* imul */, X86::IMUL64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23473 { 3237 /* insertq */, X86::INSERTQ, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23690 { 4253 /* maxpd */, X86::MAXPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23692 { 4259 /* maxps */, X86::MAXPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23694 { 4265 /* maxsd */, X86::MAXSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23696 { 4271 /* maxss */, X86::MAXSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23699 { 4284 /* minpd */, X86::MINPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23701 { 4290 /* minps */, X86::MINPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23703 { 4296 /* minsd */, X86::MINSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23705 { 4302 /* minss */, X86::MINSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23822 { 4524 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23827 { 4558 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23861 { 4729 /* movsd */, X86::MOVSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23865 { 4735 /* movsd.s */, X86::MOVSDrr_REV, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23871 { 4780 /* movss */, X86::MOVSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23874 { 4786 /* movss.s */, X86::MOVSSrr_REV, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23916 { 4934 /* mulpd */, X86::MULPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23918 { 4940 /* mulps */, X86::MULPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23920 { 4951 /* mulsd */, X86::MULSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23922 { 4957 /* mulss */, X86::MULSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23964 { 5065 /* or */, X86::OR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23968 { 5065 /* or */, X86::OR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23972 { 5065 /* or */, X86::OR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23976 { 5065 /* or */, X86::OR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23990 { 5076 /* orpd */, X86::ORPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23992 { 5081 /* orps */, X86::ORPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24024 { 5160 /* packssdw */, X86::MMX_PACKSSDWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24026 { 5160 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24028 { 5169 /* packsswb */, X86::MMX_PACKSSWBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24030 { 5169 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24032 { 5178 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24034 { 5187 /* packuswb */, X86::MMX_PACKUSWBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24036 { 5187 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24038 { 5196 /* paddb */, X86::MMX_PADDBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24040 { 5196 /* paddb */, X86::PADDBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24042 { 5202 /* paddd */, X86::MMX_PADDDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24044 { 5202 /* paddd */, X86::PADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24046 { 5208 /* paddq */, X86::MMX_PADDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24048 { 5208 /* paddq */, X86::PADDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24050 { 5214 /* paddsb */, X86::MMX_PADDSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24052 { 5214 /* paddsb */, X86::PADDSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24054 { 5221 /* paddsw */, X86::MMX_PADDSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24056 { 5221 /* paddsw */, X86::PADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24058 { 5228 /* paddusb */, X86::MMX_PADDUSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24060 { 5228 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24062 { 5236 /* paddusw */, X86::MMX_PADDUSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24064 { 5236 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24066 { 5244 /* paddw */, X86::MMX_PADDWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24068 { 5244 /* paddw */, X86::PADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24074 { 5258 /* pand */, X86::MMX_PANDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24076 { 5258 /* pand */, X86::PANDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24078 { 5263 /* pandn */, X86::MMX_PANDNirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24080 { 5263 /* pandn */, X86::PANDNrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24083 { 5275 /* pavgb */, X86::MMX_PAVGBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24085 { 5275 /* pavgb */, X86::PAVGBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24087 { 5281 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24089 { 5289 /* pavgw */, X86::MMX_PAVGWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24091 { 5289 /* pavgw */, X86::PAVGWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24093 { 5295 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24095 { 5295 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
24109 { 5374 /* pcmpeqb */, X86::MMX_PCMPEQBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24111 { 5374 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24113 { 5382 /* pcmpeqd */, X86::MMX_PCMPEQDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24115 { 5382 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24117 { 5390 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24119 { 5398 /* pcmpeqw */, X86::MMX_PCMPEQWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24121 { 5398 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24127 { 5426 /* pcmpgtb */, X86::MMX_PCMPGTBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24129 { 5426 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24131 { 5434 /* pcmpgtd */, X86::MMX_PCMPGTDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24133 { 5434 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24135 { 5442 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24137 { 5450 /* pcmpgtw */, X86::MMX_PCMPGTWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24139 { 5450 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24167 { 5560 /* pfacc */, X86::PFACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24169 { 5566 /* pfadd */, X86::PFADDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24171 { 5572 /* pfcmpeq */, X86::PFCMPEQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24173 { 5580 /* pfcmpge */, X86::PFCMPGErr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24175 { 5588 /* pfcmpgt */, X86::PFCMPGTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24177 { 5596 /* pfmax */, X86::PFMAXrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24179 { 5602 /* pfmin */, X86::PFMINrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24181 { 5608 /* pfmul */, X86::PFMULrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24183 { 5614 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24185 { 5621 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24189 { 5635 /* pfrcpit1 */, X86::PFRCPIT1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24191 { 5644 /* pfrcpit2 */, X86::PFRCPIT2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24193 { 5653 /* pfrsqit1 */, X86::PFRSQIT1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24197 { 5670 /* pfsub */, X86::PFSUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24199 { 5676 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24201 { 5683 /* phaddd */, X86::MMX_PHADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24203 { 5683 /* phaddd */, X86::PHADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24205 { 5690 /* phaddsw */, X86::MMX_PHADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24207 { 5690 /* phaddsw */, X86::PHADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24209 { 5698 /* phaddw */, X86::MMX_PHADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24211 { 5698 /* phaddw */, X86::PHADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24215 { 5716 /* phsubd */, X86::MMX_PHSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24217 { 5716 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24219 { 5723 /* phsubsw */, X86::MMX_PHSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24221 { 5723 /* phsubsw */, X86::PHSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24223 { 5731 /* phsubw */, X86::MMX_PHSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24225 { 5731 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24241 { 5778 /* pmaddubsw */, X86::MMX_PMADDUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24243 { 5778 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24245 { 5788 /* pmaddwd */, X86::MMX_PMADDWDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24247 { 5788 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24249 { 5796 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24251 { 5803 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24253 { 5810 /* pmaxsw */, X86::MMX_PMAXSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24255 { 5810 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24257 { 5817 /* pmaxub */, X86::MMX_PMAXUBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24259 { 5817 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24261 { 5824 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24263 { 5831 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24265 { 5838 /* pminsb */, X86::PMINSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24267 { 5845 /* pminsd */, X86::PMINSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24269 { 5852 /* pminsw */, X86::MMX_PMINSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24271 { 5852 /* pminsw */, X86::PMINSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24273 { 5859 /* pminub */, X86::MMX_PMINUBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24275 { 5859 /* pminub */, X86::PMINUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24277 { 5866 /* pminud */, X86::PMINUDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24279 { 5873 /* pminuw */, X86::PMINUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24307 { 5997 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24309 { 6004 /* pmulhrsw */, X86::MMX_PMULHRSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24311 { 6004 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24313 { 6013 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24315 { 6021 /* pmulhuw */, X86::MMX_PMULHUWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24317 { 6021 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24319 { 6029 /* pmulhw */, X86::MMX_PMULHWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24321 { 6029 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24323 { 6036 /* pmulld */, X86::PMULLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24325 { 6043 /* pmullw */, X86::MMX_PMULLWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24327 { 6043 /* pmullw */, X86::PMULLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24329 { 6050 /* pmuludq */, X86::MMX_PMULUDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24331 { 6050 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24362 { 6149 /* por */, X86::MMX_PORirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24364 { 6149 /* por */, X86::PORrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24373 { 6229 /* psadbw */, X86::MMX_PSADBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24375 { 6229 /* psadbw */, X86::PSADBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24377 { 6236 /* pshufb */, X86::MMX_PSHUFBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24379 { 6236 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24389 { 6273 /* psignb */, X86::MMX_PSIGNBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24391 { 6273 /* psignb */, X86::PSIGNBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24393 { 6280 /* psignd */, X86::MMX_PSIGNDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24395 { 6280 /* psignd */, X86::PSIGNDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24397 { 6287 /* psignw */, X86::MMX_PSIGNWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24399 { 6287 /* psignw */, X86::PSIGNWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24401 { 6294 /* pslld */, X86::MMX_PSLLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24404 { 6294 /* pslld */, X86::PSLLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24408 { 6307 /* psllq */, X86::MMX_PSLLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24411 { 6307 /* psllq */, X86::PSLLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24414 { 6313 /* psllw */, X86::MMX_PSLLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24417 { 6313 /* psllw */, X86::PSLLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24420 { 6319 /* psrad */, X86::MMX_PSRADrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24423 { 6319 /* psrad */, X86::PSRADrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24426 { 6325 /* psraw */, X86::MMX_PSRAWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24429 { 6325 /* psraw */, X86::PSRAWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24432 { 6331 /* psrld */, X86::MMX_PSRLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24435 { 6331 /* psrld */, X86::PSRLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24439 { 6344 /* psrlq */, X86::MMX_PSRLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24442 { 6344 /* psrlq */, X86::PSRLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24445 { 6350 /* psrlw */, X86::MMX_PSRLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24448 { 6350 /* psrlw */, X86::PSRLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24451 { 6356 /* psubb */, X86::MMX_PSUBBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24453 { 6356 /* psubb */, X86::PSUBBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24455 { 6362 /* psubd */, X86::MMX_PSUBDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24457 { 6362 /* psubd */, X86::PSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24459 { 6368 /* psubq */, X86::MMX_PSUBQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24461 { 6368 /* psubq */, X86::PSUBQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24463 { 6374 /* psubsb */, X86::MMX_PSUBSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24465 { 6374 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24467 { 6381 /* psubsw */, X86::MMX_PSUBSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24469 { 6381 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24471 { 6388 /* psubusb */, X86::MMX_PSUBUSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24473 { 6388 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24475 { 6396 /* psubusw */, X86::MMX_PSUBUSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24477 { 6396 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24479 { 6404 /* psubw */, X86::MMX_PSUBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24481 { 6404 /* psubw */, X86::PSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24491 { 6449 /* punpckhbw */, X86::MMX_PUNPCKHBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24493 { 6449 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24495 { 6459 /* punpckhdq */, X86::MMX_PUNPCKHDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24497 { 6459 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24499 { 6469 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24501 { 6480 /* punpckhwd */, X86::MMX_PUNPCKHWDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24503 { 6480 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24505 { 6490 /* punpcklbw */, X86::MMX_PUNPCKLBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24507 { 6490 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24509 { 6500 /* punpckldq */, X86::MMX_PUNPCKLDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24511 { 6500 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24513 { 6510 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24515 { 6521 /* punpcklwd */, X86::MMX_PUNPCKLWDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24517 { 6521 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24550 { 6602 /* pxor */, X86::MMX_PXORirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24552 { 6602 /* pxor */, X86::PXORrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24580 { 6637 /* rcpss */, X86::RCPSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24703 { 6994 /* rsqrtss */, X86::RSQRTSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24744 { 7074 /* sbb */, X86::SBB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24748 { 7074 /* sbb */, X86::SBB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24752 { 7074 /* sbb */, X86::SBB64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
24756 { 7074 /* sbb */, X86::SBB8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
24823 { 7266 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24825 { 7275 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24827 { 7284 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24831 { 7304 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24833 { 7315 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24835 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24837 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
24863 { 7347 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24864 { 7347 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24865 { 7347 /* shld */, X86::SHLD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
24869 { 7347 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_CL }, },
24871 { 7347 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_CL }, },
24873 { 7347 /* shld */, X86::SHLD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_CL }, },
24909 { 7411 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24910 { 7411 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24911 { 7411 /* shrd */, X86::SHRD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
24915 { 7411 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_CL }, },
24917 { 7411 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_CL }, },
24919 { 7411 /* shrd */, X86::SHRD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_CL }, },
24954 { 7583 /* sqrtsd */, X86::SQRTSDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24956 { 7590 /* sqrtss */, X86::SQRTSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24992 { 7684 /* sub */, X86::SUB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24996 { 7684 /* sub */, X86::SUB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25000 { 7684 /* sub */, X86::SUB64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
25004 { 7684 /* sub */, X86::SUB8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
25018 { 7698 /* subpd */, X86::SUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25020 { 7704 /* subps */, X86::SUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25022 { 7715 /* subsd */, X86::SUBSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25024 { 7721 /* subss */, X86::SUBSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25082 { 7952 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25084 { 7961 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25086 { 7970 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25088 { 7979 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36873 { 16192 /* xor */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
36877 { 16192 /* xor */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
36881 { 16192 /* xor */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
36885 { 16192 /* xor */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
36899 { 16206 /* xorpd */, X86::XORPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36901 { 16212 /* xorps */, X86::XORPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },