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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc 8210 { 626 /* bswapl */, X86::BSWAP32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
8211 { 633 /* bswapq */, X86::BSWAP64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
8555 { 1922 /* decb */, X86::DEC8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
8557 { 1927 /* decl */, X86::DEC32r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR32 }, },
8558 { 1927 /* decl */, X86::DEC32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
8560 { 1932 /* decq */, X86::DEC64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
8562 { 1937 /* decw */, X86::DEC16r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR16 }, },
8563 { 1937 /* decw */, X86::DEC16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
8876 { 3174 /* incb */, X86::INC8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
8878 { 3179 /* incl */, X86::INC32r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR32 }, },
8879 { 3179 /* incl */, X86::INC32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
8881 { 3184 /* incq */, X86::INC64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
8885 { 3205 /* incw */, X86::INC16r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR16 }, },
8886 { 3205 /* incw */, X86::INC16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
9383 { 5002 /* negb */, X86::NEG8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
9385 { 5007 /* negl */, X86::NEG32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
9387 { 5012 /* negq */, X86::NEG64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
9389 { 5017 /* negw */, X86::NEG16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
9398 { 5045 /* notb */, X86::NOT8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
9400 { 5050 /* notl */, X86::NOT32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
9402 { 5055 /* notq */, X86::NOT64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
9404 { 5060 /* notw */, X86::NOT16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10000 { 6611 /* rclb */, X86::RCL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10006 { 6616 /* rcll */, X86::RCL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10012 { 6621 /* rclq */, X86::RCL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
10018 { 6626 /* rclw */, X86::RCL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10028 { 6647 /* rcrb */, X86::RCR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10034 { 6652 /* rcrl */, X86::RCR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10040 { 6657 /* rcrq */, X86::RCR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
10046 { 6662 /* rcrw */, X86::RCR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10067 { 6812 /* rdsspd */, X86::RDSSPD, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10068 { 6819 /* rdsspq */, X86::RDSSPQ, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
10080 { 6889 /* rolb */, X86::ROL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10086 { 6894 /* roll */, X86::ROL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10092 { 6899 /* rolq */, X86::ROL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
10098 { 6904 /* rolw */, X86::ROL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10104 { 6913 /* rorb */, X86::ROR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10110 { 6918 /* rorl */, X86::ROR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10116 { 6923 /* rorq */, X86::ROR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
10122 { 6928 /* rorw */, X86::ROR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10148 { 7025 /* sarb */, X86::SAR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10154 { 7030 /* sarl */, X86::SAR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10160 { 7035 /* sarq */, X86::SAR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
10166 { 7040 /* sarw */, X86::SAR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10275 { 7342 /* shlb */, X86::SHL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10299 { 7370 /* shll */, X86::SHL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10305 { 7375 /* shlq */, X86::SHL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
10311 { 7380 /* shlw */, X86::SHL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10321 { 7406 /* shrb */, X86::SHR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10345 { 7434 /* shrl */, X86::SHR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10351 { 7439 /* shrq */, X86::SHR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
10357 { 7444 /* shrw */, X86::SHR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
22475 { 16106 /* xchgl */, X86::XCHG32ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_EAX }, },
22481 { 16112 /* xchgq */, X86::XCHG64ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_RAX }, },
22486 { 16118 /* xchgw */, X86::XCHG16ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_AX }, },
22803 { 620 /* bswap */, X86::BSWAP32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
22804 { 620 /* bswap */, X86::BSWAP64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
23127 { 1918 /* dec */, X86::DEC16r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR16 }, },
23128 { 1918 /* dec */, X86::DEC16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
23129 { 1918 /* dec */, X86::DEC32r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR32 }, },
23130 { 1918 /* dec */, X86::DEC32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
23131 { 1918 /* dec */, X86::DEC64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
23132 { 1918 /* dec */, X86::DEC8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
23452 { 3170 /* inc */, X86::INC16r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR16 }, },
23453 { 3170 /* inc */, X86::INC16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
23454 { 3170 /* inc */, X86::INC32r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR32 }, },
23455 { 3170 /* inc */, X86::INC32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
23456 { 3170 /* inc */, X86::INC64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
23457 { 3170 /* inc */, X86::INC8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
23934 { 4998 /* neg */, X86::NEG16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
23935 { 4998 /* neg */, X86::NEG32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
23936 { 4998 /* neg */, X86::NEG64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
23937 { 4998 /* neg */, X86::NEG8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
23949 { 5041 /* not */, X86::NOT16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
23950 { 5041 /* not */, X86::NOT32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
23951 { 5041 /* not */, X86::NOT64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
23952 { 5041 /* not */, X86::NOT8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24554 { 6607 /* rcl */, X86::RCL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24555 { 6607 /* rcl */, X86::RCL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24556 { 6607 /* rcl */, X86::RCL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
24557 { 6607 /* rcl */, X86::RCL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24562 { 6607 /* rcl */, X86::RCL16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24564 { 6607 /* rcl */, X86::RCL32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24566 { 6607 /* rcl */, X86::RCL64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, },
24568 { 6607 /* rcl */, X86::RCL8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24582 { 6643 /* rcr */, X86::RCR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24583 { 6643 /* rcr */, X86::RCR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24584 { 6643 /* rcr */, X86::RCR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
24585 { 6643 /* rcr */, X86::RCR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24590 { 6643 /* rcr */, X86::RCR16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24592 { 6643 /* rcr */, X86::RCR32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24594 { 6643 /* rcr */, X86::RCR64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, },
24596 { 6643 /* rcr */, X86::RCR8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24621 { 6812 /* rdsspd */, X86::RDSSPD, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24622 { 6819 /* rdsspq */, X86::RDSSPQ, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
24640 { 6885 /* rol */, X86::ROL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24641 { 6885 /* rol */, X86::ROL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24642 { 6885 /* rol */, X86::ROL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
24643 { 6885 /* rol */, X86::ROL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24648 { 6885 /* rol */, X86::ROL16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24650 { 6885 /* rol */, X86::ROL32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24652 { 6885 /* rol */, X86::ROL64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, },
24654 { 6885 /* rol */, X86::ROL8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24664 { 6909 /* ror */, X86::ROR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24665 { 6909 /* ror */, X86::ROR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24666 { 6909 /* ror */, X86::ROR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
24667 { 6909 /* ror */, X86::ROR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24672 { 6909 /* ror */, X86::ROR16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24674 { 6909 /* ror */, X86::ROR32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24676 { 6909 /* ror */, X86::ROR64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, },
24678 { 6909 /* ror */, X86::ROR8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24708 { 7021 /* sar */, X86::SAR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24709 { 7021 /* sar */, X86::SAR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24710 { 7021 /* sar */, X86::SAR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
24711 { 7021 /* sar */, X86::SAR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24716 { 7021 /* sar */, X86::SAR16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24718 { 7021 /* sar */, X86::SAR32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24720 { 7021 /* sar */, X86::SAR64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, },
24722 { 7021 /* sar */, X86::SAR8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24839 { 7338 /* shl */, X86::SHL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24840 { 7338 /* shl */, X86::SHL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24841 { 7338 /* shl */, X86::SHL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
24842 { 7338 /* shl */, X86::SHL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24847 { 7338 /* shl */, X86::SHL16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24849 { 7338 /* shl */, X86::SHL32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24851 { 7338 /* shl */, X86::SHL64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, },
24853 { 7338 /* shl */, X86::SHL8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24885 { 7402 /* shr */, X86::SHR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24886 { 7402 /* shr */, X86::SHR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24887 { 7402 /* shr */, X86::SHR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
24888 { 7402 /* shr */, X86::SHR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24893 { 7402 /* shr */, X86::SHR16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24895 { 7402 /* shr */, X86::SHR32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24897 { 7402 /* shr */, X86::SHR64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, },
24899 { 7402 /* shr */, X86::SHR8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
36843 { 16095 /* xchg */, X86::XCHG16ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_AX }, },
36846 { 16095 /* xchg */, X86::XCHG32ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_EAX }, },
36849 { 16095 /* xchg */, X86::XCHG64ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_RAX }, },