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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc25431 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25433 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25435 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25458 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25460 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25462 { 8199 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30615 { 12354 /* vpblendmb */, X86::VPBLENDMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30617 { 12354 /* vpblendmb */, X86::VPBLENDMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30619 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30636 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30638 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30640 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30663 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30665 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30667 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30687 { 12384 /* vpblendmw */, X86::VPBLENDMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30689 { 12384 /* vpblendmw */, X86::VPBLENDMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30691 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30933 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30935 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30937 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30952 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30954 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30956 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30974 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30976 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30978 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30993 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30995 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30997 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31013 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31015 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31017 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31032 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31034 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31036 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31054 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31056 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31058 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31073 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31075 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31077 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34307 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34309 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34311 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35336 { 14942 /* vptestmb */, X86::VPTESTMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35338 { 14942 /* vptestmb */, X86::VPTESTMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35340 { 14942 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35351 { 14951 /* vptestmd */, X86::VPTESTMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35353 { 14951 /* vptestmd */, X86::VPTESTMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35355 { 14951 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35369 { 14960 /* vptestmq */, X86::VPTESTMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35371 { 14960 /* vptestmq */, X86::VPTESTMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35373 { 14960 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35384 { 14969 /* vptestmw */, X86::VPTESTMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35386 { 14969 /* vptestmw */, X86::VPTESTMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35388 { 14969 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35396 { 14978 /* vptestnmb */, X86::VPTESTNMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35398 { 14978 /* vptestnmb */, X86::VPTESTNMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35400 { 14978 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35411 { 14988 /* vptestnmd */, X86::VPTESTNMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35413 { 14988 /* vptestnmd */, X86::VPTESTNMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35415 { 14988 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35429 { 14998 /* vptestnmq */, X86::VPTESTNMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35431 { 14998 /* vptestnmq */, X86::VPTESTNMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35433 { 14998 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35444 { 15008 /* vptestnmw */, X86::VPTESTNMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35446 { 15008 /* vptestnmw */, X86::VPTESTNMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35448 { 15008 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },