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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc25484 { 8227 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
25486 { 8227 /* vblendvpd */, X86::VBLENDVPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
25488 { 8237 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
25490 { 8237 /* vblendvps */, X86::VBLENDVPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27348 { 9935 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27351 { 9935 /* vfmaddpd */, X86::VFMADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27354 { 9944 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27357 { 9944 /* vfmaddps */, X86::VFMADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27360 { 9953 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27363 { 9962 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27570 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27573 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27576 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27579 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28056 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28059 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28062 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28065 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28068 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28071 { 10343 /* vfmsubpd */, X86::VFMSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28074 { 10352 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28077 { 10352 /* vfmsubps */, X86::VFMSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28080 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28083 { 10370 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28356 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28359 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28362 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28365 { 10545 /* vfnmaddps */, X86::VFNMADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28368 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28371 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28644 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28647 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28650 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28653 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28656 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28659 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30699 { 12394 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30701 { 12394 /* vpblendvb */, X86::VPBLENDVBYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
30887 { 12564 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30890 { 12564 /* vpcmov */, X86::VPCMOVYrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
32225 { 13506 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32227 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32229 { 13525 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32231 { 13535 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32233 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32235 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32237 { 13567 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32239 { 13577 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32241 { 13587 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32243 { 13596 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32245 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32247 { 13616 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
33706 { 14320 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },