|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc25244 { 8143 /* valignd */, X86::VALIGNDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25246 { 8143 /* valignd */, X86::VALIGNDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25248 { 8143 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25271 { 8151 /* valignq */, X86::VALIGNQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25273 { 8151 /* valignq */, X86::VALIGNQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25275 { 8151 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25476 { 8209 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25478 { 8209 /* vblendpd */, X86::VBLENDPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
25480 { 8218 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25482 { 8218 /* vblendps */, X86::VBLENDPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
25596 { 8463 /* vcmppd */, X86::VCMPPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25598 { 8463 /* vcmppd */, X86::VCMPPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25600 { 8463 /* vcmppd */, X86::VCMPPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25602 { 8463 /* vcmppd */, X86::VCMPPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25604 { 8463 /* vcmppd */, X86::VCMPPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
25620 { 8470 /* vcmpps */, X86::VCMPPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25622 { 8470 /* vcmpps */, X86::VCMPPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25624 { 8470 /* vcmpps */, X86::VCMPPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25626 { 8470 /* vcmpps */, X86::VCMPPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25628 { 8470 /* vcmpps */, X86::VCMPPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
25644 { 8477 /* vcmpsd */, X86::VCMPSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25646 { 8477 /* vcmpsd */, X86::VCMPSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25652 { 8484 /* vcmpss */, X86::VCMPSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25654 { 8484 /* vcmpss */, X86::VCMPSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
26727 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26729 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26731 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26862 { 9536 /* vdppd */, X86::VDPPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
26864 { 9542 /* vdpps */, X86::VDPPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
26866 { 9542 /* vdpps */, X86::VDPPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
28884 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28893 { 11148 /* vgetmantss */, X86::VGETMANTSSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28902 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
28904 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
28906 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28908 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28910 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28933 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
28935 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
28937 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28939 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28941 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29002 { 11235 /* vinsertf128 */, X86::VINSERTF128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32, MCK_ImmUnsignedi8 }, },
29004 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29006 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29016 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29022 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29024 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29034 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29040 { 11299 /* vinserti128 */, X86::VINSERTI128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32, MCK_ImmUnsignedi8 }, },
29042 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29044 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29054 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29060 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29062 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29072 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29078 { 11363 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29080 { 11363 /* vinsertps */, X86::VINSERTPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29824 { 11951 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29826 { 11951 /* vmpsadbw */, X86::VMPSADBWYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30423 { 12279 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30425 { 12279 /* vpalignr */, X86::VPALIGNRYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30427 { 12279 /* vpalignr */, X86::VPALIGNRZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30429 { 12279 /* vpalignr */, X86::VPALIGNRZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30431 { 12279 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30605 { 12345 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30607 { 12345 /* vpblendd */, X86::VPBLENDDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30703 { 12404 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30705 { 12404 /* vpblendw */, X86::VPBLENDWYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30877 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30879 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30881 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30883 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30885 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30893 { 12571 /* vpcmpb */, X86::VPCMPBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30895 { 12571 /* vpcmpb */, X86::VPCMPBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30897 { 12571 /* vpcmpb */, X86::VPCMPBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30905 { 12578 /* vpcmpd */, X86::VPCMPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30907 { 12578 /* vpcmpd */, X86::VPCMPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30909 { 12578 /* vpcmpd */, X86::VPCMPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31083 { 12701 /* vpcmpq */, X86::VPCMPQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31085 { 12701 /* vpcmpq */, X86::VPCMPQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31087 { 12701 /* vpcmpq */, X86::VPCMPQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31101 { 12708 /* vpcmpub */, X86::VPCMPUBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31103 { 12708 /* vpcmpub */, X86::VPCMPUBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31105 { 12708 /* vpcmpub */, X86::VPCMPUBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31113 { 12716 /* vpcmpud */, X86::VPCMPUDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31115 { 12716 /* vpcmpud */, X86::VPCMPUDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31117 { 12716 /* vpcmpud */, X86::VPCMPUDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31131 { 12724 /* vpcmpuq */, X86::VPCMPUQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31133 { 12724 /* vpcmpuq */, X86::VPCMPUQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31135 { 12724 /* vpcmpuq */, X86::VPCMPUQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31149 { 12732 /* vpcmpuw */, X86::VPCMPUWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31151 { 12732 /* vpcmpuw */, X86::VPCMPUWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31153 { 12732 /* vpcmpuw */, X86::VPCMPUWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31161 { 12740 /* vpcmpw */, X86::VPCMPWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31163 { 12740 /* vpcmpw */, X86::VPCMPWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31165 { 12740 /* vpcmpw */, X86::VPCMPWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31173 { 12747 /* vpcomb */, X86::VPCOMBri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31175 { 12754 /* vpcomd */, X86::VPCOMDri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31237 { 12809 /* vpcomq */, X86::VPCOMQri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31239 { 12816 /* vpcomub */, X86::VPCOMUBri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31241 { 12824 /* vpcomud */, X86::VPCOMUDri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31243 { 12832 /* vpcomuq */, X86::VPCOMUQri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31245 { 12840 /* vpcomuw */, X86::VPCOMUWri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31247 { 12848 /* vpcomw */, X86::VPCOMWri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31411 { 12917 /* vperm2f128 */, X86::VPERM2F128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
31413 { 12928 /* vperm2i128 */, X86::VPERM2I128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
32159 { 13464 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
32161 { 13464 /* vpinsrd */, X86::VPINSRDZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32, MCK_ImmUnsignedi8 }, },
32163 { 13472 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR64, MCK_ImmUnsignedi8 }, },
32165 { 13472 /* vpinsrq */, X86::VPINSRQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR64, MCK_ImmUnsignedi8 }, },
33985 { 14513 /* vpshldd */, X86::VPSHLDDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33987 { 14513 /* vpshldd */, X86::VPSHLDDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33989 { 14513 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34012 { 14521 /* vpshldq */, X86::VPSHLDQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34014 { 14521 /* vpshldq */, X86::VPSHLDQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34016 { 14521 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34111 { 14556 /* vpshldw */, X86::VPSHLDWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34113 { 14556 /* vpshldw */, X86::VPSHLDWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34115 { 14556 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34135 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34137 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34139 { 14578 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34162 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34164 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34166 { 14586 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34261 { 14621 /* vpshrdw */, X86::VPSHRDWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34263 { 14621 /* vpshrdw */, X86::VPSHRDWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34265 { 14621 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35720 { 15128 /* vrangepd */, X86::VRANGEPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35722 { 15128 /* vrangepd */, X86::VRANGEPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35724 { 15128 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35750 { 15137 /* vrangeps */, X86::VRANGEPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35752 { 15137 /* vrangeps */, X86::VRANGEPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35754 { 15137 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35780 { 15146 /* vrangesd */, X86::VRANGESDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35789 { 15155 /* vrangess */, X86::VRANGESSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35972 { 15270 /* vreducesd */, X86::VREDUCESDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35981 { 15280 /* vreducess */, X86::VREDUCESSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36050 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36059 { 15326 /* vrndscaless */, X86::VRNDSCALESSZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36076 { 15356 /* vroundsd */, X86::VROUNDSDr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36078 { 15365 /* vroundss */, X86::VROUNDSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36292 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36294 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36310 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36312 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36328 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36330 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36346 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36348 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36364 { 15732 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36366 { 15732 /* vshufpd */, X86::VSHUFPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
36368 { 15732 /* vshufpd */, X86::VSHUFPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36370 { 15732 /* vshufpd */, X86::VSHUFPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36372 { 15732 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36395 { 15740 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36397 { 15740 /* vshufps */, X86::VSHUFPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
36399 { 15740 /* vshufps */, X86::VSHUFPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36401 { 15740 /* vshufps */, X86::VSHUFPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36403 { 15740 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },