reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

22657   { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22706   { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
22716   { 291 /* blcfill */, X86::BLCFILL32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22718   { 291 /* blcfill */, X86::BLCFILL64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22720   { 317 /* blci */, X86::BLCI32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22722   { 317 /* blci */, X86::BLCI64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22724   { 322 /* blcic */, X86::BLCIC32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22726   { 322 /* blcic */, X86::BLCIC64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22728   { 354 /* blcmsk */, X86::BLCMSK32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22730   { 354 /* blcmsk */, X86::BLCMSK64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22732   { 377 /* blcs */, X86::BLCS32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22734   { 377 /* blcs */, X86::BLCS64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22748   { 428 /* blsfill */, X86::BLSFILL32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22750   { 428 /* blsfill */, X86::BLSFILL64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22752   { 454 /* blsi */, X86::BLSI32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22754   { 454 /* blsi */, X86::BLSI64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22756   { 459 /* blsic */, X86::BLSIC32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22758   { 459 /* blsic */, X86::BLSIC64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22760   { 491 /* blsmsk */, X86::BLSMSK32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22762   { 491 /* blsmsk */, X86::BLSMSK64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22764   { 514 /* blsr */, X86::BLSR32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22766   { 514 /* blsr */, X86::BLSR64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22768   { 531 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
22769   { 531 /* bndcl */, X86::BNDCL64rr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
22772   { 537 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
22773   { 537 /* bndcn */, X86::BNDCN64rr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
22776   { 543 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
22777   { 543 /* bndcu */, X86::BNDCU64rr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
22783   { 562 /* bndmov */, X86::BNDMOVrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_BNDR, MCK_BNDR }, },
22791   { 582 /* bsf */, X86::BSF16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22793   { 582 /* bsf */, X86::BSF32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22795   { 582 /* bsf */, X86::BSF64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22797   { 601 /* bsr */, X86::BSR16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22799   { 601 /* bsr */, X86::BSR32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22801   { 601 /* bsr */, X86::BSR64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22805   { 640 /* bt */, X86::BT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22807   { 640 /* bt */, X86::BT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22809   { 640 /* bt */, X86::BT64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22997   { 1348 /* cmp */, X86::CMP16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23001   { 1348 /* cmp */, X86::CMP32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23005   { 1348 /* cmp */, X86::CMP64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23009   { 1348 /* cmp */, X86::CMP8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23039   { 1425 /* cmpxchg */, X86::CMPXCHG16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23040   { 1425 /* cmpxchg */, X86::CMPXCHG32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23041   { 1425 /* cmpxchg */, X86::CMPXCHG64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23042   { 1425 /* cmpxchg */, X86::CMPXCHG8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23049   { 1490 /* comisd */, X86::COMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23051   { 1497 /* comiss */, X86::COMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23066   { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23068   { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23070   { 1574 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23072   { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
23074   { 1592 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23076   { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
23080   { 1619 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23082   { 1628 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23084   { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
23086   { 1646 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23088   { 1646 /* cvtsd2si */, X86::CVTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
23102   { 1751 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23104   { 1751 /* cvtss2si */, X86::CVTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
23106   { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23108   { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
23110   { 1800 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23112   { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
23114   { 1820 /* cvttsd2si */, X86::CVTTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23116   { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
23118   { 1852 /* cvttss2si */, X86::CVTTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23120   { 1852 /* cvttss2si */, X86::CVTTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
23537   { 3513 /* kmovb */, X86::KMOVBkk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23538   { 3513 /* kmovb */, X86::KMOVBkr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_GR32 }, },
23540   { 3513 /* kmovb */, X86::KMOVBrk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_VK1 }, },
23542   { 3519 /* kmovd */, X86::KMOVDkk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23543   { 3519 /* kmovd */, X86::KMOVDkr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_GR32 }, },
23545   { 3519 /* kmovd */, X86::KMOVDrk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_VK1 }, },
23547   { 3525 /* kmovq */, X86::KMOVQkk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23548   { 3525 /* kmovq */, X86::KMOVQkr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_GR64 }, },
23550   { 3525 /* kmovq */, X86::KMOVQrk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_VK1 }, },
23552   { 3531 /* kmovw */, X86::KMOVWkk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23553   { 3531 /* kmovw */, X86::KMOVWkr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_GR32 }, },
23555   { 3531 /* kmovw */, X86::KMOVWrk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_VK1 }, },
23557   { 3537 /* knotb */, X86::KNOTBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23558   { 3543 /* knotd */, X86::KNOTDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23559   { 3549 /* knotq */, X86::KNOTQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23560   { 3555 /* knotw */, X86::KNOTWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23564   { 3576 /* kortestb */, X86::KORTESTBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23565   { 3585 /* kortestd */, X86::KORTESTDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23566   { 3594 /* kortestq */, X86::KORTESTQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23567   { 3603 /* kortestw */, X86::KORTESTWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23577   { 3689 /* ktestb */, X86::KTESTBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23578   { 3696 /* ktestd */, X86::KTESTDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23579   { 3703 /* ktestq */, X86::KTESTQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23580   { 3710 /* ktestw */, X86::KTESTWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23593   { 3801 /* lar */, X86::LAR16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23595   { 3801 /* lar */, X86::LAR32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23597   { 3801 /* lar */, X86::LAR64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR32 }, },
23661   { 4145 /* lsl */, X86::LSL16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23663   { 4145 /* lsl */, X86::LSL32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23665   { 4145 /* lsl */, X86::LSL64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR32 }, },
23680   { 4206 /* lzcnt */, X86::LZCNT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23682   { 4206 /* lzcnt */, X86::LZCNT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23684   { 4206 /* lzcnt */, X86::LZCNT64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23686   { 4233 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
23687   { 4233 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, },
23688   { 4244 /* maskmovq */, X86::MMX_MASKMOVQ, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_VR64, MCK_VR64 }, },
23689   { 4244 /* maskmovq */, X86::MMX_MASKMOVQ64, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_VR64, MCK_VR64 }, },
23723   { 4333 /* mov */, X86::MOV16sr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR16 }, },
23724   { 4333 /* mov */, X86::MOV32sr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR32 }, },
23725   { 4333 /* mov */, X86::MOV64sr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR64 }, },
23727   { 4333 /* mov */, X86::MOV32cr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, },
23728   { 4333 /* mov */, X86::MOV64cr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_CONTROL_REG, MCK_GR64 }, },
23729   { 4333 /* mov */, X86::MOV32dr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, },
23730   { 4333 /* mov */, X86::MOV64dr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_DEBUG_REG, MCK_GR64 }, },
23731   { 4333 /* mov */, X86::MOV16rs, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_SEGMENT_REG }, },
23732   { 4333 /* mov */, X86::MOV16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23735   { 4333 /* mov */, X86::MOV32rs, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_SEGMENT_REG }, },
23736   { 4333 /* mov */, X86::MOV32rc, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, },
23737   { 4333 /* mov */, X86::MOV32rd, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, },
23738   { 4333 /* mov */, X86::MOV32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23741   { 4333 /* mov */, X86::MOV64rs, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_SEGMENT_REG }, },
23742   { 4333 /* mov */, X86::MOV64rc, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_GR64, MCK_CONTROL_REG }, },
23743   { 4333 /* mov */, X86::MOV64rd, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_GR64, MCK_DEBUG_REG }, },
23744   { 4333 /* mov */, X86::MOV64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23748   { 4333 /* mov */, X86::MOV8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23767   { 4337 /* mov.s */, X86::MOV16rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23768   { 4337 /* mov.s */, X86::MOV32rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23769   { 4337 /* mov.s */, X86::MOV64rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23770   { 4337 /* mov.s */, X86::MOV8rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23780   { 4382 /* movapd */, X86::MOVAPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23783   { 4389 /* movapd.s */, X86::MOVAPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23784   { 4398 /* movaps */, X86::MOVAPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23787   { 4405 /* movaps.s */, X86::MOVAPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23794   { 4453 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_GR32 }, },
23795   { 4453 /* movd */, X86::MMX_MOVD64to64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_GR64 }, },
23797   { 4453 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
23798   { 4453 /* movd */, X86::MOV64toPQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
23800   { 4453 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_VR64 }, },
23801   { 4453 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23802   { 4453 /* movd */, X86::MMX_MOVD64from64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_VR64 }, },
23803   { 4453 /* movd */, X86::MOVPQIto64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
23806   { 4458 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23813   { 4484 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
23814   { 4492 /* movdqa */, X86::MOVDQArr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23817   { 4499 /* movdqa.s */, X86::MOVDQArr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23818   { 4508 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23821   { 4515 /* movdqu.s */, X86::MOVDQUrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23843   { 4677 /* movq */, X86::MMX_MOVQ64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
23844   { 4677 /* movq */, X86::MMX_MOVD64to64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_GR64 }, },
23846   { 4677 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23847   { 4677 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
23849   { 4677 /* movq */, X86::MMX_MOVD64from64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_VR64 }, },
23850   { 4677 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
23853   { 4682 /* movq.s */, X86::MMX_MOVQ64rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
23854   { 4682 /* movq.s */, X86::MOVPQI2QIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23855   { 4689 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
23866   { 4743 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23868   { 4758 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23876   { 4814 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR8 }, },
23878   { 4814 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR16 }, },
23879   { 4814 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR8 }, },
23882   { 4814 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR16 }, },
23883   { 4814 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR8 }, },
23886   { 4820 /* movsxd */, X86::MOVSX64rr32, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_GR64, MCK_GR32 }, },
23888   { 4827 /* movupd */, X86::MOVUPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23891   { 4834 /* movupd.s */, X86::MOVUPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23892   { 4843 /* movups */, X86::MOVUPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23895   { 4850 /* movups.s */, X86::MOVUPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23896   { 4906 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR8 }, },
23898   { 4906 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR16 }, },
23899   { 4906 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR8 }, },
23902   { 4906 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR16 }, },
23903   { 4906 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR8 }, },
24012   { 5142 /* pabsb */, X86::MMX_PABSBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24014   { 5142 /* pabsb */, X86::PABSBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24016   { 5148 /* pabsd */, X86::MMX_PABSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24018   { 5148 /* pabsd */, X86::PABSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24020   { 5154 /* pabsw */, X86::MMX_PABSWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24022   { 5154 /* pabsw */, X86::PABSWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24163   { 5548 /* pf2id */, X86::PF2IDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24165   { 5554 /* pf2iw */, X86::PF2IWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24187   { 5629 /* pfrcp */, X86::PFRCPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24195   { 5662 /* pfrsqrt */, X86::PFRSQRTrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24213   { 5705 /* phminposuw */, X86::PHMINPOSUWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24227   { 5738 /* pi2fd */, X86::PI2FDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24229   { 5744 /* pi2fw */, X86::PI2FWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24283   { 5889 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24285   { 5898 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24287   { 5907 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24289   { 5916 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24291   { 5925 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24293   { 5934 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24295   { 5943 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24297   { 5952 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24299   { 5961 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24301   { 5970 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24303   { 5979 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24305   { 5988 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24353   { 6074 /* popcnt */, X86::POPCNT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24355   { 6074 /* popcnt */, X86::POPCNT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24357   { 6074 /* popcnt */, X86::POPCNT64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
24483   { 6410 /* pswapd */, X86::PSWAPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24485   { 6417 /* ptest */, X86::PTESTrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24578   { 6631 /* rcpps */, X86::RCPPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24701   { 6986 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24950   { 7569 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24952   { 7576 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25033   { 7805 /* t1mskc */, X86::T1MSKC32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25035   { 7805 /* t1mskc */, X86::T1MSKC64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
25041   { 7828 /* test */, X86::TEST16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
25044   { 7828 /* test */, X86::TEST32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25047   { 7828 /* test */, X86::TEST64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
25050   { 7828 /* test */, X86::TEST8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
25062   { 7864 /* tzcnt */, X86::TZCNT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
25064   { 7864 /* tzcnt */, X86::TZCNT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25066   { 7864 /* tzcnt */, X86::TZCNT64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
25068   { 7891 /* tzmsk */, X86::TZMSK32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25070   { 7891 /* tzmsk */, X86::TZMSK64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
25072   { 7911 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25074   { 7919 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25240   { 8118 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25493   { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
25495   { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
25524   { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25526   { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
25528   { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
25560   { 8437 /* vbroadcastsd */, X86::VBROADCASTSDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
25562   { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
25564   { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
25574   { 8450 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25576   { 8450 /* vbroadcastss */, X86::VBROADCASTSSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
25578   { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25580   { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
25582   { 8450 /* vbroadcastss */, X86::VBROADCASTSSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
25660   { 8491 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25662   { 8491 /* vcomisd */, X86::VCOMISDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25664   { 8491 /* vcomisd */, X86::VCOMISDZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
25665   { 8499 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25667   { 8499 /* vcomiss */, X86::VCOMISSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25669   { 8499 /* vcomiss */, X86::VCOMISSZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
25670   { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25671   { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
25672   { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25685   { 8519 /* vcompressps */, X86::VCOMPRESSPSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25686   { 8519 /* vcompressps */, X86::VCOMPRESSPSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
25687   { 8519 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25700   { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25702   { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
25704   { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25706   { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
25708   { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
25731   { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25733   { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
25735   { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25737   { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
25739   { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25792   { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25793   { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
25796   { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
25819   { 8580 /* vcvtneps2bf16x */, X86::VCVTNEPS2BF16Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25821   { 8595 /* vcvtneps2bf16y */, X86::VCVTNEPS2BF16Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
25823   { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25824   { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
25827   { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25828   { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
25831   { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
25857   { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25858   { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
25861   { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25862   { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
25865   { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
25891   { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25893   { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
25895   { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25921   { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25922   { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
25925   { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
25951   { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25953   { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
25955   { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25981   { 8730 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25983   { 8730 /* vcvtph2ps */, X86::VCVTPH2PSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
25985   { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25987   { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
25989   { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
25991   { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
26006   { 8740 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26008   { 8740 /* vcvtps2dq */, X86::VCVTPS2DQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
26010   { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26012   { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26014   { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26040   { 8750 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26042   { 8750 /* vcvtps2pd */, X86::VCVTPS2PDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
26044   { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26046   { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
26048   { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26052   { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
26096   { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26098   { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
26100   { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26126   { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26128   { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26130   { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26156   { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26158   { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
26160   { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26186   { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26188   { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26190   { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26216   { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26217   { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
26220   { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
26246   { 8844 /* vcvtsd2si */, X86::VCVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
26247   { 8844 /* vcvtsd2si */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26250   { 8844 /* vcvtsd2si */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
26251   { 8844 /* vcvtsd2si */, X86::VCVTSD2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
26267   { 8886 /* vcvtsd2usi */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26269   { 8886 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
26303   { 8995 /* vcvtss2si */, X86::VCVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
26304   { 8995 /* vcvtss2si */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26307   { 8995 /* vcvtss2si */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
26308   { 8995 /* vcvtss2si */, X86::VCVTSS2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
26313   { 9027 /* vcvtss2usi */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26315   { 9027 /* vcvtss2usi */, X86::VCVTSS2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
26319   { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26320   { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
26323   { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26324   { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
26327   { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
26331   { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_ }, },
26353   { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26355   { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26357   { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26361   { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26383   { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26384   { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
26387   { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
26391   { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_ }, },
26413   { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26415   { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26417   { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26421   { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26443   { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26445   { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
26447   { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26449   { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26451   { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26455   { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26477   { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26479   { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
26481   { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26485   { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
26507   { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26509   { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26511   { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26515   { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26537   { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26539   { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
26541   { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26545   { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
26567   { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
26568   { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26571   { 9204 /* vcvttsd2si */, X86::VCVTTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
26572   { 9204 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
26575   { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
26576   { 9204 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
26577   { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26579   { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
26581   { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
26582   { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
26583   { 9277 /* vcvttss2si */, X86::VCVTTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
26584   { 9277 /* vcvttss2si */, X86::VCVTTSS2SIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26587   { 9277 /* vcvttss2si */, X86::VCVTTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
26588   { 9277 /* vcvttss2si */, X86::VCVTTSS2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
26591   { 9277 /* vcvttss2si */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
26592   { 9277 /* vcvttss2si */, X86::VCVTTSS2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
26593   { 9312 /* vcvttss2usi */, X86::VCVTTSS2USIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26595   { 9312 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
26597   { 9312 /* vcvttss2usi */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
26598   { 9312 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
26599   { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26601   { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
26603   { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26626   { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26628   { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26630   { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26656   { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26658   { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26660   { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26686   { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26687   { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
26690   { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
26872   { 9558 /* vexp2pd */, X86::VEXP2PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26874   { 9558 /* vexp2pd */, X86::VEXP2PDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26884   { 9566 /* vexp2ps */, X86::VEXP2PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26886   { 9566 /* vexp2ps */, X86::VEXP2PSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26896   { 9574 /* vexpandpd */, X86::VEXPANDPDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26898   { 9574 /* vexpandpd */, X86::VEXPANDPDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26900   { 9574 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26914   { 9584 /* vexpandps */, X86::VEXPANDPSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26916   { 9584 /* vexpandps */, X86::VEXPANDPSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26918   { 9584 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
28706   { 10887 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
28708   { 10887 /* vfrczpd */, X86::VFRCZPDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
28710   { 10895 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
28712   { 10895 /* vfrczps */, X86::VFRCZPSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
28714   { 10903 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
28716   { 10911 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
28746   { 11075 /* vgetexppd */, X86::VGETEXPPDZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
28748   { 11075 /* vgetexppd */, X86::VGETEXPPDZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
28750   { 11075 /* vgetexppd */, X86::VGETEXPPDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
28754   { 11075 /* vgetexppd */, X86::VGETEXPPDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28776   { 11085 /* vgetexpps */, X86::VGETEXPPSZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
28778   { 11085 /* vgetexpps */, X86::VGETEXPPSZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
28780   { 11085 /* vgetexpps */, X86::VGETEXPPSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
28784   { 11085 /* vgetexpps */, X86::VGETEXPPSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29085   { 11389 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
29086   { 11389 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, },
29282   { 11525 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29284   { 11525 /* vmovapd */, X86::VMOVAPDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29286   { 11525 /* vmovapd */, X86::VMOVAPDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29288   { 11525 /* vmovapd */, X86::VMOVAPDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29290   { 11525 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29312   { 11533 /* vmovapd.s */, X86::VMOVAPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29313   { 11533 /* vmovapd.s */, X86::VMOVAPDYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29314   { 11533 /* vmovapd.s */, X86::VMOVAPDZ128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29315   { 11533 /* vmovapd.s */, X86::VMOVAPDZ256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29316   { 11533 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29323   { 11543 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29325   { 11543 /* vmovaps */, X86::VMOVAPSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29327   { 11543 /* vmovaps */, X86::VMOVAPSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29329   { 11543 /* vmovaps */, X86::VMOVAPSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29331   { 11543 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29353   { 11551 /* vmovaps.s */, X86::VMOVAPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29354   { 11551 /* vmovaps.s */, X86::VMOVAPSYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29355   { 11551 /* vmovaps.s */, X86::VMOVAPSZ128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29356   { 11551 /* vmovaps.s */, X86::VMOVAPSZ256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29357   { 11551 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29364   { 11561 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
29365   { 11561 /* vmovd */, X86::VMOV64toPQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
29367   { 11561 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
29368   { 11561 /* vmovd */, X86::VMOVPDI2DIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
29369   { 11561 /* vmovd */, X86::VMOVPQIto64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
29370   { 11561 /* vmovd */, X86::VMOVPQIto64Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
29371   { 11561 /* vmovd */, X86::VMOVDI2PDIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
29372   { 11561 /* vmovd */, X86::VMOV64toPQIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
29376   { 11567 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29378   { 11567 /* vmovddup */, X86::VMOVDDUPYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29380   { 11567 /* vmovddup */, X86::VMOVDDUPZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29382   { 11567 /* vmovddup */, X86::VMOVDDUPZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29384   { 11567 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29398   { 11576 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29400   { 11576 /* vmovdqa */, X86::VMOVDQAYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29404   { 11584 /* vmovdqa.s */, X86::VMOVDQArr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29405   { 11584 /* vmovdqa.s */, X86::VMOVDQAYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29406   { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29408   { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29410   { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29430   { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29431   { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29432   { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29439   { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29441   { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29443   { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29463   { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29464   { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29465   { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29472   { 11638 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29474   { 11638 /* vmovdqu */, X86::VMOVDQUYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29478   { 11646 /* vmovdqu.s */, X86::VMOVDQUrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29479   { 11646 /* vmovdqu.s */, X86::VMOVDQUYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29480   { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29482   { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29484   { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29504   { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29505   { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29506   { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29513   { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29515   { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29517   { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29537   { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29538   { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29539   { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29546   { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29548   { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29550   { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29570   { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29571   { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29572   { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29579   { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29581   { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29583   { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29603   { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29604   { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29605   { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29656   { 11849 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29657   { 11849 /* vmovq */, X86::VMOV64toPQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
29659   { 11849 /* vmovq */, X86::VMOVPQIto64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
29660   { 11849 /* vmovq */, X86::VMOVPQIto64Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
29661   { 11849 /* vmovq */, X86::VMOV64toPQIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
29662   { 11849 /* vmovq */, X86::VMOVZPQILo2PQIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29666   { 11855 /* vmovq.s */, X86::VMOVPQI2QIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29667   { 11855 /* vmovq.s */, X86::VMOVPQI2QIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29683   { 11879 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29685   { 11879 /* vmovshdup */, X86::VMOVSHDUPYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29687   { 11879 /* vmovshdup */, X86::VMOVSHDUPZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29689   { 11879 /* vmovshdup */, X86::VMOVSHDUPZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29691   { 11879 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29705   { 11889 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29707   { 11889 /* vmovsldup */, X86::VMOVSLDUPYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29709   { 11889 /* vmovsldup */, X86::VMOVSLDUPZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29711   { 11889 /* vmovsldup */, X86::VMOVSLDUPZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29713   { 11889 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29742   { 11915 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29744   { 11915 /* vmovupd */, X86::VMOVUPDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29746   { 11915 /* vmovupd */, X86::VMOVUPDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29748   { 11915 /* vmovupd */, X86::VMOVUPDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29750   { 11915 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29772   { 11923 /* vmovupd.s */, X86::VMOVUPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29773   { 11923 /* vmovupd.s */, X86::VMOVUPDYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29774   { 11923 /* vmovupd.s */, X86::VMOVUPDZ128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29775   { 11923 /* vmovupd.s */, X86::VMOVUPDZ256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29776   { 11923 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29783   { 11933 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29785   { 11933 /* vmovups */, X86::VMOVUPSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29787   { 11933 /* vmovups */, X86::VMOVUPSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29789   { 11933 /* vmovups */, X86::VMOVUPSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29791   { 11933 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29813   { 11941 /* vmovups.s */, X86::VMOVUPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29814   { 11941 /* vmovups.s */, X86::VMOVUPSYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29815   { 11941 /* vmovups.s */, X86::VMOVUPSZ128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29816   { 11941 /* vmovups.s */, X86::VMOVUPSZ256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29817   { 11941 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29830   { 11976 /* vmread */, X86::VMREAD32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
29831   { 11976 /* vmread */, X86::VMREAD64rr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_GR64, MCK_GR64 }, },
29929   { 12049 /* vmwrite */, X86::VMWRITE32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
29931   { 12049 /* vmwrite */, X86::VMWRITE64rr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_GR64, MCK_GR64 }, },
30021   { 12149 /* vpabsb */, X86::VPABSBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30023   { 12149 /* vpabsb */, X86::VPABSBYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
30025   { 12149 /* vpabsb */, X86::VPABSBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30027   { 12149 /* vpabsb */, X86::VPABSBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
30029   { 12149 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30043   { 12156 /* vpabsd */, X86::VPABSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30045   { 12156 /* vpabsd */, X86::VPABSDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
30047   { 12156 /* vpabsd */, X86::VPABSDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30049   { 12156 /* vpabsd */, X86::VPABSDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
30051   { 12156 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30074   { 12163 /* vpabsq */, X86::VPABSQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30076   { 12163 /* vpabsq */, X86::VPABSQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
30078   { 12163 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30101   { 12170 /* vpabsw */, X86::VPABSWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30103   { 12170 /* vpabsw */, X86::VPABSWYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
30105   { 12170 /* vpabsw */, X86::VPABSWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30107   { 12170 /* vpabsw */, X86::VPABSWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
30109   { 12170 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30707   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30709   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
30711   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
30712   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30714   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_GR32 }, },
30715   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
30717   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR32 }, },
30718   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
30738   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30740   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
30742   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
30743   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30745   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_GR32 }, },
30746   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
30748   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR32 }, },
30749   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
30769   { 12439 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, },
30770   { 12439 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, },
30771   { 12439 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
30772   { 12455 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, },
30773   { 12455 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, },
30774   { 12455 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
30775   { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30777   { 12471 /* vpbroadcastq */, X86::VPBROADCASTQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
30779   { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
30780   { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30782   { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_GR64 }, },
30783   { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
30785   { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR64 }, },
30786   { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
30806   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30808   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
30810   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
30811   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30813   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_GR32 }, },
30814   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
30816   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR32 }, },
30817   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
31177   { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
31178   { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
31179   { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31192   { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
31193   { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
31194   { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31207   { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
31208   { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
31209   { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31222   { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
31223   { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
31224   { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31249   { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
31251   { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
31253   { 12855 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31276   { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
31278   { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
31280   { 12867 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31991   { 13137 /* vpexpandb */, X86::VPEXPANDBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
31993   { 13137 /* vpexpandb */, X86::VPEXPANDBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
31995   { 13137 /* vpexpandb */, X86::VPEXPANDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32009   { 13147 /* vpexpandd */, X86::VPEXPANDDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32011   { 13147 /* vpexpandd */, X86::VPEXPANDDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
32013   { 13147 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32027   { 13157 /* vpexpandq */, X86::VPEXPANDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32029   { 13157 /* vpexpandq */, X86::VPEXPANDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
32031   { 13157 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32045   { 13167 /* vpexpandw */, X86::VPEXPANDWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32047   { 13167 /* vpexpandw */, X86::VPEXPANDWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
32049   { 13167 /* vpexpandw */, X86::VPEXPANDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32099   { 13253 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32101   { 13262 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32103   { 13271 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32109   { 13288 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32115   { 13306 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32117   { 13316 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32119   { 13326 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32121   { 13336 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32123   { 13346 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32125   { 13356 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32131   { 13374 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32133   { 13383 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32135   { 13392 /* vphminposuw */, X86::VPHMINPOSUWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32137   { 13404 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32143   { 13421 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32153   { 13447 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32171   { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32173   { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
32175   { 13488 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32198   { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32200   { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
32202   { 13497 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32763   { 13820 /* vpmovb2m */, X86::VPMOVB2MZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_FR32X }, },
32764   { 13820 /* vpmovb2m */, X86::VPMOVB2MZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR256X }, },
32765   { 13820 /* vpmovb2m */, X86::VPMOVB2MZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
32766   { 13829 /* vpmovd2m */, X86::VPMOVD2MZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_FR32X }, },
32767   { 13829 /* vpmovd2m */, X86::VPMOVD2MZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR256X }, },
32768   { 13829 /* vpmovd2m */, X86::VPMOVD2MZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
32769   { 13838 /* vpmovdb */, X86::VPMOVDBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32770   { 13838 /* vpmovdb */, X86::VPMOVDBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
32771   { 13838 /* vpmovdb */, X86::VPMOVDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
32784   { 13846 /* vpmovdw */, X86::VPMOVDWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32785   { 13846 /* vpmovdw */, X86::VPMOVDWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
32786   { 13846 /* vpmovdw */, X86::VPMOVDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
32799   { 13854 /* vpmovm2b */, X86::VPMOVM2BZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, },
32800   { 13854 /* vpmovm2b */, X86::VPMOVM2BZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, },
32801   { 13854 /* vpmovm2b */, X86::VPMOVM2BZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
32802   { 13863 /* vpmovm2d */, X86::VPMOVM2DZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, },
32803   { 13863 /* vpmovm2d */, X86::VPMOVM2DZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, },
32804   { 13863 /* vpmovm2d */, X86::VPMOVM2DZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
32805   { 13872 /* vpmovm2q */, X86::VPMOVM2QZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, },
32806   { 13872 /* vpmovm2q */, X86::VPMOVM2QZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, },
32807   { 13872 /* vpmovm2q */, X86::VPMOVM2QZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
32808   { 13881 /* vpmovm2w */, X86::VPMOVM2WZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, },
32809   { 13881 /* vpmovm2w */, X86::VPMOVM2WZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, },
32810   { 13881 /* vpmovm2w */, X86::VPMOVM2WZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
32813   { 13900 /* vpmovq2m */, X86::VPMOVQ2MZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_FR32X }, },
32814   { 13900 /* vpmovq2m */, X86::VPMOVQ2MZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR256X }, },
32815   { 13900 /* vpmovq2m */, X86::VPMOVQ2MZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
32816   { 13909 /* vpmovqb */, X86::VPMOVQBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32817   { 13909 /* vpmovqb */, X86::VPMOVQBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
32818   { 13909 /* vpmovqb */, X86::VPMOVQBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
32831   { 13917 /* vpmovqd */, X86::VPMOVQDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32832   { 13917 /* vpmovqd */, X86::VPMOVQDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
32833   { 13917 /* vpmovqd */, X86::VPMOVQDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
32846   { 13925 /* vpmovqw */, X86::VPMOVQWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32847   { 13925 /* vpmovqw */, X86::VPMOVQWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
32848   { 13925 /* vpmovqw */, X86::VPMOVQWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
32861   { 13933 /* vpmovsdb */, X86::VPMOVSDBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32862   { 13933 /* vpmovsdb */, X86::VPMOVSDBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
32863   { 13933 /* vpmovsdb */, X86::VPMOVSDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
32876   { 13942 /* vpmovsdw */, X86::VPMOVSDWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32877   { 13942 /* vpmovsdw */, X86::VPMOVSDWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
32878   { 13942 /* vpmovsdw */, X86::VPMOVSDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
32891   { 13951 /* vpmovsqb */, X86::VPMOVSQBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32892   { 13951 /* vpmovsqb */, X86::VPMOVSQBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
32893   { 13951 /* vpmovsqb */, X86::VPMOVSQBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
32906   { 13960 /* vpmovsqd */, X86::VPMOVSQDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32907   { 13960 /* vpmovsqd */, X86::VPMOVSQDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
32908   { 13960 /* vpmovsqd */, X86::VPMOVSQDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
32921   { 13969 /* vpmovsqw */, X86::VPMOVSQWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32922   { 13969 /* vpmovsqw */, X86::VPMOVSQWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
32923   { 13969 /* vpmovsqw */, X86::VPMOVSQWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
32936   { 13978 /* vpmovswb */, X86::VPMOVSWBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32937   { 13978 /* vpmovswb */, X86::VPMOVSWBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
32938   { 13978 /* vpmovswb */, X86::VPMOVSWBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
32951   { 13987 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32953   { 13987 /* vpmovsxbd */, X86::VPMOVSXBDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
32955   { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32957   { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
32959   { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
32973   { 13997 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32975   { 13997 /* vpmovsxbq */, X86::VPMOVSXBQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
32977   { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32979   { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
32981   { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
32995   { 14007 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32997   { 14007 /* vpmovsxbw */, X86::VPMOVSXBWYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
32999   { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33001   { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33003   { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33017   { 14017 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33019   { 14017 /* vpmovsxdq */, X86::VPMOVSXDQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33021   { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33023   { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33025   { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33039   { 14027 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33041   { 14027 /* vpmovsxwd */, X86::VPMOVSXWDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33043   { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33045   { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33047   { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33061   { 14037 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33063   { 14037 /* vpmovsxwq */, X86::VPMOVSXWQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33065   { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33067   { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33069   { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
33083   { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33084   { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33085   { 14047 /* vpmovusdb */, X86::VPMOVUSDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
33098   { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33099   { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33100   { 14057 /* vpmovusdw */, X86::VPMOVUSDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33113   { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33114   { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33115   { 14067 /* vpmovusqb */, X86::VPMOVUSQBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
33128   { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33129   { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33130   { 14077 /* vpmovusqd */, X86::VPMOVUSQDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33143   { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33144   { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33145   { 14087 /* vpmovusqw */, X86::VPMOVUSQWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
33158   { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33159   { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33160   { 14097 /* vpmovuswb */, X86::VPMOVUSWBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33173   { 14107 /* vpmovw2m */, X86::VPMOVW2MZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_FR32X }, },
33174   { 14107 /* vpmovw2m */, X86::VPMOVW2MZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR256X }, },
33175   { 14107 /* vpmovw2m */, X86::VPMOVW2MZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
33176   { 14116 /* vpmovwb */, X86::VPMOVWBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33177   { 14116 /* vpmovwb */, X86::VPMOVWBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33178   { 14116 /* vpmovwb */, X86::VPMOVWBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33191   { 14124 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33193   { 14124 /* vpmovzxbd */, X86::VPMOVZXBDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33195   { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33197   { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33199   { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
33213   { 14134 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33215   { 14134 /* vpmovzxbq */, X86::VPMOVZXBQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33217   { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33219   { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33221   { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
33235   { 14144 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33237   { 14144 /* vpmovzxbw */, X86::VPMOVZXBWYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33239   { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33241   { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33243   { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33257   { 14154 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33259   { 14154 /* vpmovzxdq */, X86::VPMOVZXDQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33261   { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33263   { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33265   { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33279   { 14164 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33281   { 14164 /* vpmovzxwd */, X86::VPMOVZXWDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33283   { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33285   { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33287   { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33301   { 14174 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33303   { 14174 /* vpmovzxwq */, X86::VPMOVZXWQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33305   { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33307   { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33309   { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
33558   { 14267 /* vpopcntb */, X86::VPOPCNTBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33560   { 14267 /* vpopcntb */, X86::VPOPCNTBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
33562   { 14267 /* vpopcntb */, X86::VPOPCNTBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
33576   { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33578   { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
33580   { 14276 /* vpopcntd */, X86::VPOPCNTDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
33603   { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33605   { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
33607   { 14285 /* vpopcntq */, X86::VPOPCNTQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
33630   { 14294 /* vpopcntw */, X86::VPOPCNTWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33632   { 14294 /* vpopcntw */, X86::VPOPCNTWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
33634   { 14294 /* vpopcntw */, X86::VPOPCNTWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
35326   { 14935 /* vptest */, X86::VPTESTrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
35328   { 14935 /* vptest */, X86::VPTESTYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
35798   { 15164 /* vrcp14pd */, X86::VRCP14PDZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
35800   { 15164 /* vrcp14pd */, X86::VRCP14PDZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
35802   { 15164 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
35825   { 15173 /* vrcp14ps */, X86::VRCP14PSZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
35827   { 15173 /* vrcp14ps */, X86::VRCP14PSZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
35829   { 15173 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
35864   { 15200 /* vrcp28pd */, X86::VRCP28PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
35866   { 15200 /* vrcp28pd */, X86::VRCP28PDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
35876   { 15209 /* vrcp28ps */, X86::VRCP28PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
35878   { 15209 /* vrcp28ps */, X86::VRCP28PSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
35906   { 15236 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
35908   { 15236 /* vrcpps */, X86::VRCPPSYr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
36080   { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
36082   { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
36084   { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36107   { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
36109   { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
36111   { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36146   { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36148   { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
36158   { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36160   { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
36188   { 15462 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36190   { 15462 /* vrsqrtps */, X86::VRSQRTPSYr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
36426   { 15748 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36428   { 15748 /* vsqrtpd */, X86::VSQRTPDYr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
36430   { 15748 /* vsqrtpd */, X86::VSQRTPDZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
36432   { 15748 /* vsqrtpd */, X86::VSQRTPDZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
36434   { 15748 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36460   { 15756 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36462   { 15756 /* vsqrtps */, X86::VSQRTPSYr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
36464   { 15756 /* vsqrtps */, X86::VSQRTPSZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
36466   { 15756 /* vsqrtps */, X86::VSQRTPSZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
36468   { 15756 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36607   { 15817 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36609   { 15817 /* vtestpd */, X86::VTESTPDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
36611   { 15825 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36613   { 15825 /* vtestps */, X86::VTESTPSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
36615   { 15833 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36617   { 15833 /* vucomisd */, X86::VUCOMISDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
36619   { 15833 /* vucomisd */, X86::VUCOMISDZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
36620   { 15842 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36622   { 15842 /* vucomiss */, X86::VUCOMISSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
36624   { 15842 /* vucomiss */, X86::VUCOMISSZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },