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|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/SystemZ/SystemZGenInstrInfo.inc 4630 { 310, 3, 1, 6, 97, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #310 = IIHF64
4631 { 311, 3, 1, 4, 98, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #311 = IIHH64
4632 { 312, 3, 1, 4, 99, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #312 = IIHL64
4634 { 314, 3, 1, 6, 100, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #314 = IILF64
4635 { 315, 3, 1, 4, 101, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #315 = IILH64
4636 { 316, 3, 1, 4, 102, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #316 = IILL64
4664 { 344, 3, 1, 6, 148, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #344 = NIHF64
4665 { 345, 3, 1, 4, 149, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #345 = NIHH64
4666 { 346, 3, 1, 4, 150, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #346 = NIHL64
4668 { 348, 3, 1, 6, 151, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #348 = NILF64
4669 { 349, 3, 1, 4, 152, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #349 = NILH64
4670 { 350, 3, 1, 4, 153, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #350 = NILL64
4677 { 357, 3, 1, 6, 160, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #357 = OIHF64
4678 { 358, 3, 1, 4, 161, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #358 = OIHH64
4679 { 359, 3, 1, 4, 162, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #359 = OIHL64
4681 { 361, 3, 1, 6, 163, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #361 = OILF64
4682 { 362, 3, 1, 4, 164, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #362 = OILH64
4683 { 363, 3, 1, 4, 165, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #363 = OILL64
4735 { 415, 3, 1, 6, 172, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #415 = XIHF64
4736 { 416, 3, 1, 6, 173, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #416 = XILF64
4753 { 433, 3, 1, 6, 108, 0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #433 = AGFI
4756 { 436, 3, 1, 4, 109, 0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #436 = AGHI
4776 { 456, 3, 1, 6, 117, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #456 = ALGFI
4892 { 572, 3, 1, 4, 7, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #572 = BRCTG
5868 { 1548, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1548 = LOCGHIAsmE
5869 { 1549, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1549 = LOCGHIAsmH
5870 { 1550, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1550 = LOCGHIAsmHE
5871 { 1551, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1551 = LOCGHIAsmL
5872 { 1552, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1552 = LOCGHIAsmLE
5873 { 1553, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1553 = LOCGHIAsmLH
5874 { 1554, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1554 = LOCGHIAsmM
5875 { 1555, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1555 = LOCGHIAsmNE
5876 { 1556, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1556 = LOCGHIAsmNH
5877 { 1557, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1557 = LOCGHIAsmNHE
5878 { 1558, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1558 = LOCGHIAsmNL
5879 { 1559, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1559 = LOCGHIAsmNLE
5880 { 1560, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1560 = LOCGHIAsmNLH
5881 { 1561, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1561 = LOCGHIAsmNM
5882 { 1562, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1562 = LOCGHIAsmNO
5883 { 1563, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1563 = LOCGHIAsmNP
5884 { 1564, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1564 = LOCGHIAsmNZ
5885 { 1565, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1565 = LOCGHIAsmO
5886 { 1566, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1566 = LOCGHIAsmP
5887 { 1567, 3, 1, 6, 52, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1567 = LOCGHIAsmZ
6078 { 1758, 3, 1, 4, 188, 0, 0x0ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1758 = MGHI
6104 { 1784, 3, 1, 6, 185, 0, 0x0ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #1784 = MSGFI
6356 { 2036, 3, 1, 6, 134, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, // Inst #2036 = SLGFI