reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/SystemZ/SystemZGenInstrInfo.inc
 5120   { 800,	5,	0,	6,	253,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo176, -1 ,nullptr },  // Inst #800 = CLC
 5500   { 1180,	5,	0,	6,	310,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo176, -1 ,nullptr },  // Inst #1180 = ED
 5501   { 1181,	5,	0,	6,	310,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo176, -1 ,nullptr },  // Inst #1181 = EDMK
 6112   { 1792,	5,	0,	6,	26,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo176, -1 ,nullptr },  // Inst #1792 = MVC
 6114   { 1794,	5,	0,	6,	85,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo176, -1 ,nullptr },  // Inst #1794 = MVCIN
 6129   { 1809,	5,	0,	6,	300,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo176, -1 ,nullptr },  // Inst #1809 = MVN
 6133   { 1813,	5,	0,	6,	300,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo176, -1 ,nullptr },  // Inst #1813 = MVZ
 6149   { 1829,	5,	0,	6,	155,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo176, -1 ,nullptr },  // Inst #1829 = NC
 6175   { 1855,	5,	0,	6,	167,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo176, -1 ,nullptr },  // Inst #1855 = OC
 6568   { 2248,	5,	0,	6,	282,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo176, -1 ,nullptr },  // Inst #2248 = TR
 6578   { 2258,	5,	0,	6,	283,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList21, OperandInfo176, -1 ,nullptr },  // Inst #2258 = TRT
 6583   { 2263,	5,	0,	6,	284,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList21, OperandInfo176, -1 ,nullptr },  // Inst #2263 = TRTR
 6591   { 2271,	5,	0,	6,	302,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo176, -1 ,nullptr },  // Inst #2271 = UNPKA
 6592   { 2272,	5,	0,	6,	302,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo176, -1 ,nullptr },  // Inst #2272 = UNPKU
 7311   { 2991,	5,	0,	6,	175,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo176, -1 ,nullptr },  // Inst #2991 = XC