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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/SystemZ/SystemZGenInstrInfo.inc 4579 { 259, 3, 0, 6, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #259 = CGIBCall
4581 { 261, 3, 0, 6, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #261 = CGRBCall
4584 { 264, 3, 0, 6, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #264 = CIBCall
4589 { 269, 3, 0, 6, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo50, -1 ,nullptr }, // Inst #269 = CLGIBCall
4591 { 271, 3, 0, 6, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #271 = CLGRBCall
4593 { 273, 3, 0, 6, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #273 = CLIBCall
4596 { 276, 3, 0, 6, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #276 = CLRBCall
4600 { 280, 3, 0, 6, 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #280 = CRBCall
4603 { 283, 2, 0, 2, 4, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x40000ULL, ImplicitList2, nullptr, OperandInfo7, -1 ,nullptr }, // Inst #283 = CallBCR
4604 { 284, 0, 0, 2, 5, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, nullptr, -1 ,nullptr }, // Inst #284 = CallBR
6579 { 2259, 4, 2, 4, 286, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo324, -1 ,nullptr }, // Inst #2259 = TRTE
6580 { 2260, 3, 2, 4, 286, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo325, -1 ,nullptr }, // Inst #2260 = TRTEOpt
6584 { 2264, 4, 2, 4, 286, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo324, -1 ,nullptr }, // Inst #2264 = TRTRE
6585 { 2265, 3, 2, 4, 286, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo325, -1 ,nullptr }, // Inst #2265 = TRTREOpt