reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

 4498   { 178,	3,	1,	0,	106,	0|(1ULL<<MCID::Pseudo), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #178 = AFIMux
 4499   { 179,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x23d0cULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #179 = AG_MemFoldPseudo
 4500   { 180,	3,	1,	0,	112,	0|(1ULL<<MCID::Pseudo), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #180 = AHIMux
 4501   { 181,	3,	1,	0,	112,	0|(1ULL<<MCID::Pseudo), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #181 = AHIMuxK
 4502   { 182,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x10cULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #182 = ALG_MemFoldPseudo
 4503   { 183,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #183 = AL_MemFoldPseudo
 4504   { 184,	8,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo42, -1 ,nullptr },  // Inst #184 = ATOMIC_CMP_SWAPW
 4505   { 185,	7,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #185 = ATOMIC_LOADW_AFI
 4506   { 186,	7,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #186 = ATOMIC_LOADW_AR
 4507   { 187,	7,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #187 = ATOMIC_LOADW_MAX
 4508   { 188,	7,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #188 = ATOMIC_LOADW_MIN
 4509   { 189,	7,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #189 = ATOMIC_LOADW_NILH
 4510   { 190,	7,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #190 = ATOMIC_LOADW_NILHi
 4511   { 191,	7,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #191 = ATOMIC_LOADW_NR
 4512   { 192,	7,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #192 = ATOMIC_LOADW_NRi
 4513   { 193,	7,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #193 = ATOMIC_LOADW_OILH
 4514   { 194,	7,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #194 = ATOMIC_LOADW_OR
 4515   { 195,	7,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #195 = ATOMIC_LOADW_SR
 4516   { 196,	7,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #196 = ATOMIC_LOADW_UMAX
 4517   { 197,	7,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #197 = ATOMIC_LOADW_UMIN
 4518   { 198,	7,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #198 = ATOMIC_LOADW_XILF
 4519   { 199,	7,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #199 = ATOMIC_LOADW_XR
 4520   { 200,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #200 = ATOMIC_LOAD_AFI
 4521   { 201,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #201 = ATOMIC_LOAD_AGFI
 4522   { 202,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #202 = ATOMIC_LOAD_AGHI
 4523   { 203,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #203 = ATOMIC_LOAD_AGR
 4524   { 204,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #204 = ATOMIC_LOAD_AHI
 4525   { 205,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo48, -1 ,nullptr },  // Inst #205 = ATOMIC_LOAD_AR
 4526   { 206,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo48, -1 ,nullptr },  // Inst #206 = ATOMIC_LOAD_MAX_32
 4527   { 207,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #207 = ATOMIC_LOAD_MAX_64
 4528   { 208,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo48, -1 ,nullptr },  // Inst #208 = ATOMIC_LOAD_MIN_32
 4529   { 209,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #209 = ATOMIC_LOAD_MIN_64
 4530   { 210,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #210 = ATOMIC_LOAD_NGR
 4531   { 211,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #211 = ATOMIC_LOAD_NGRi
 4532   { 212,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #212 = ATOMIC_LOAD_NIHF64
 4533   { 213,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #213 = ATOMIC_LOAD_NIHF64i
 4534   { 214,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #214 = ATOMIC_LOAD_NIHH64
 4535   { 215,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #215 = ATOMIC_LOAD_NIHH64i
 4536   { 216,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #216 = ATOMIC_LOAD_NIHL64
 4537   { 217,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #217 = ATOMIC_LOAD_NIHL64i
 4538   { 218,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #218 = ATOMIC_LOAD_NILF
 4539   { 219,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #219 = ATOMIC_LOAD_NILF64
 4540   { 220,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #220 = ATOMIC_LOAD_NILF64i
 4541   { 221,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #221 = ATOMIC_LOAD_NILFi
 4542   { 222,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #222 = ATOMIC_LOAD_NILH
 4543   { 223,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #223 = ATOMIC_LOAD_NILH64
 4544   { 224,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #224 = ATOMIC_LOAD_NILH64i
 4545   { 225,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #225 = ATOMIC_LOAD_NILHi
 4546   { 226,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #226 = ATOMIC_LOAD_NILL
 4547   { 227,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #227 = ATOMIC_LOAD_NILL64
 4548   { 228,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #228 = ATOMIC_LOAD_NILL64i
 4549   { 229,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #229 = ATOMIC_LOAD_NILLi
 4550   { 230,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo48, -1 ,nullptr },  // Inst #230 = ATOMIC_LOAD_NR
 4551   { 231,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo48, -1 ,nullptr },  // Inst #231 = ATOMIC_LOAD_NRi
 4552   { 232,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #232 = ATOMIC_LOAD_OGR
 4553   { 233,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #233 = ATOMIC_LOAD_OIHF64
 4554   { 234,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #234 = ATOMIC_LOAD_OIHH64
 4555   { 235,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #235 = ATOMIC_LOAD_OIHL64
 4556   { 236,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #236 = ATOMIC_LOAD_OILF
 4557   { 237,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #237 = ATOMIC_LOAD_OILF64
 4558   { 238,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #238 = ATOMIC_LOAD_OILH
 4559   { 239,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #239 = ATOMIC_LOAD_OILH64
 4560   { 240,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #240 = ATOMIC_LOAD_OILL
 4561   { 241,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #241 = ATOMIC_LOAD_OILL64
 4562   { 242,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo48, -1 ,nullptr },  // Inst #242 = ATOMIC_LOAD_OR
 4563   { 243,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #243 = ATOMIC_LOAD_SGR
 4564   { 244,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo48, -1 ,nullptr },  // Inst #244 = ATOMIC_LOAD_SR
 4565   { 245,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo48, -1 ,nullptr },  // Inst #245 = ATOMIC_LOAD_UMAX_32
 4566   { 246,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #246 = ATOMIC_LOAD_UMAX_64
 4567   { 247,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo48, -1 ,nullptr },  // Inst #247 = ATOMIC_LOAD_UMIN_32
 4568   { 248,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #248 = ATOMIC_LOAD_UMIN_64
 4569   { 249,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #249 = ATOMIC_LOAD_XGR
 4570   { 250,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #250 = ATOMIC_LOAD_XIHF64
 4571   { 251,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #251 = ATOMIC_LOAD_XILF
 4572   { 252,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #252 = ATOMIC_LOAD_XILF64
 4573   { 253,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo48, -1 ,nullptr },  // Inst #253 = ATOMIC_LOAD_XR
 4574   { 254,	7,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #254 = ATOMIC_SWAPW
 4575   { 255,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo48, -1 ,nullptr },  // Inst #255 = ATOMIC_SWAP_32
 4576   { 256,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #256 = ATOMIC_SWAP_64
 4577   { 257,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x23c88ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #257 = A_MemFoldPseudo
 4578   { 258,	2,	0,	0,	220,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo49, -1 ,nullptr },  // Inst #258 = CFIMux
 4583   { 263,	2,	0,	0,	220,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo49, -1 ,nullptr },  // Inst #263 = CHIMux
 4586   { 266,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo53, -1 ,nullptr },  // Inst #266 = CLCLoop
 4587   { 267,	5,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo54, -1 ,nullptr },  // Inst #267 = CLCSequence
 4588   { 268,	2,	0,	0,	229,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo49, -1 ,nullptr },  // Inst #268 = CLFIMux
 4595   { 275,	4,	0,	0,	227,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x10388cULL, nullptr, ImplicitList1, OperandInfo55, -1 ,nullptr },  // Inst #275 = CLMux
 4598   { 278,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo57, -1 ,nullptr },  // Inst #278 = CLSTLoop
 4599   { 279,	4,	0,	0,	218,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x388cULL, nullptr, ImplicitList1, OperandInfo55, -1 ,nullptr },  // Inst #279 = CMux
 4608   { 288,	2,	0,	2,	23,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x40000ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #288 = CondReturn
 4609   { 289,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #289 = CondStore16
 4610   { 290,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #290 = CondStore16Inv
 4611   { 291,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #291 = CondStore16Mux
 4612   { 292,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #292 = CondStore16MuxInv
 4613   { 293,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #293 = CondStore32
 4614   { 294,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #294 = CondStore32Inv
 4615   { 295,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #295 = CondStore32Mux
 4616   { 296,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #296 = CondStore32MuxInv
 4617   { 297,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo62, -1 ,nullptr },  // Inst #297 = CondStore64
 4618   { 298,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo62, -1 ,nullptr },  // Inst #298 = CondStore64Inv
 4619   { 299,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #299 = CondStore8
 4620   { 300,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #300 = CondStore8Inv
 4621   { 301,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #301 = CondStore8Mux
 4622   { 302,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #302 = CondStore8MuxInv
 4623   { 303,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #303 = CondStoreF32
 4624   { 304,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #304 = CondStoreF32Inv
 4625   { 305,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo64, -1 ,nullptr },  // Inst #305 = CondStoreF64
 4626   { 306,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo64, -1 ,nullptr },  // Inst #306 = CondStoreF64Inv
 4627   { 307,	2,	0,	4,	13,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #307 = CondTrap
 4649   { 329,	5,	1,	0,	52,	0|(1ULL<<MCID::Pseudo), 0x80000ULL, ImplicitList1, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #329 = LOCHIMux
 4650   { 330,	6,	1,	0,	53,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80080ULL, ImplicitList1, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #330 = LOCMux
 4651   { 331,	5,	1,	0,	50,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x80000ULL, ImplicitList1, nullptr, OperandInfo73, -1 ,nullptr },  // Inst #331 = LOCRMux
 4652   { 332,	2,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #332 = LTDBRCompare_VecPseudo
 4653   { 333,	2,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo75, -1 ,nullptr },  // Inst #333 = LTEBRCompare_VecPseudo
 4654   { 334,	2,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #334 = LTXBRCompare_VecPseudo
 4656   { 336,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo53, -1 ,nullptr },  // Inst #336 = MVCLoop
 4657   { 337,	5,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo54, -1 ,nullptr },  // Inst #337 = MVCSequence
 4658   { 338,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo57, -1 ,nullptr },  // Inst #338 = MVSTLoop
 4660   { 340,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo53, -1 ,nullptr },  // Inst #340 = NCLoop
 4661   { 341,	5,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo54, -1 ,nullptr },  // Inst #341 = NCSequence
 4662   { 342,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2310cULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #342 = NG_MemFoldPseudo
 4663   { 343,	3,	1,	0,	146,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #343 = NIFMux
 4664   { 344,	3,	1,	6,	148,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #344 = NIHF64
 4665   { 345,	3,	1,	4,	149,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #345 = NIHH64
 4666   { 346,	3,	1,	4,	150,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #346 = NIHL64
 4667   { 347,	3,	1,	0,	146,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #347 = NIHMux
 4668   { 348,	3,	1,	6,	151,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #348 = NILF64
 4669   { 349,	3,	1,	4,	152,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #349 = NILH64
 4670   { 350,	3,	1,	4,	153,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #350 = NILL64
 4671   { 351,	3,	1,	0,	146,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #351 = NILMux
 4672   { 352,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x23088ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #352 = N_MemFoldPseudo
 4673   { 353,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo53, -1 ,nullptr },  // Inst #353 = OCLoop
 4674   { 354,	5,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo54, -1 ,nullptr },  // Inst #354 = OCSequence
 4675   { 355,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2310cULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #355 = OG_MemFoldPseudo
 4676   { 356,	3,	1,	0,	159,	0|(1ULL<<MCID::Pseudo), 0x23000ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #356 = OIFMux
 4677   { 357,	3,	1,	6,	160,	0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #357 = OIHF64
 4678   { 358,	3,	1,	4,	161,	0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #358 = OIHH64
 4679   { 359,	3,	1,	4,	162,	0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #359 = OIHL64
 4680   { 360,	3,	1,	0,	159,	0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #360 = OIHMux
 4681   { 361,	3,	1,	6,	163,	0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #361 = OILF64
 4682   { 362,	3,	1,	4,	164,	0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #362 = OILH64
 4683   { 363,	3,	1,	4,	165,	0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #363 = OILL64
 4684   { 364,	3,	1,	0,	159,	0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #364 = OILMux
 4685   { 365,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x23088ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #365 = O_MemFoldPseudo
 4693   { 373,	5,	1,	0,	55,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x80000ULL, ImplicitList1, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #373 = SELRMux
 4694   { 374,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x23d0cULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #374 = SG_MemFoldPseudo
 4695   { 375,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x10cULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #375 = SLG_MemFoldPseudo
 4696   { 376,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #376 = SL_MemFoldPseudo
 4697   { 377,	4,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo57, -1 ,nullptr },  // Inst #377 = SRSTLoop
 4702   { 382,	5,	0,	0,	54,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80080ULL, ImplicitList1, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #382 = STOCMux
 4704   { 384,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x23c88ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #384 = S_MemFoldPseudo
 4705   { 385,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo86, -1 ,nullptr },  // Inst #385 = Select32
 4706   { 386,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #386 = Select64
 4707   { 387,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #387 = SelectF128
 4708   { 388,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #388 = SelectF32
 4709   { 389,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo90, -1 ,nullptr },  // Inst #389 = SelectF64
 4710   { 390,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #390 = SelectVR128
 4711   { 391,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo92, -1 ,nullptr },  // Inst #391 = SelectVR32
 4712   { 392,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo93, -1 ,nullptr },  // Inst #392 = SelectVR64
 4714   { 394,	3,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #394 = TBEGIN_nofloat
 4717   { 397,	2,	0,	4,	258,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #397 = TMHH64
 4718   { 398,	2,	0,	4,	259,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #398 = TMHL64
 4719   { 399,	2,	0,	0,	257,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo49, -1 ,nullptr },  // Inst #399 = TMHMux
 4720   { 400,	2,	0,	4,	260,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #400 = TMLH64
 4721   { 401,	2,	0,	4,	261,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #401 = TMLL64
 4722   { 402,	2,	0,	0,	257,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo49, -1 ,nullptr },  // Inst #402 = TMLMux
 4731   { 411,	6,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo53, -1 ,nullptr },  // Inst #411 = XCLoop
 4732   { 412,	5,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo54, -1 ,nullptr },  // Inst #412 = XCSequence
 4733   { 413,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2310cULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #413 = XG_MemFoldPseudo
 4734   { 414,	3,	1,	0,	170,	0|(1ULL<<MCID::Pseudo), 0x23000ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #414 = XIFMux
 4735   { 415,	3,	1,	6,	172,	0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #415 = XIHF64
 4736   { 416,	3,	1,	6,	173,	0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #416 = XILF64
 4737   { 417,	5,	1,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x23088ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #417 = X_MemFoldPseudo
 4739   { 419,	5,	1,	4,	103,	0|(1ULL<<MCID::MayLoad), 0x23c88ULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #419 = A
 4740   { 420,	5,	1,	4,	433,	0|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, ImplicitList1, OperandInfo102, -1 ,nullptr },  // Inst #420 = AD
 4741   { 421,	5,	1,	6,	379,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fd08ULL, ImplicitList3, ImplicitList1, OperandInfo102, -1 ,nullptr },  // Inst #421 = ADB
 4742   { 422,	3,	1,	4,	380,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x3fc00ULL, ImplicitList3, ImplicitList1, OperandInfo103, -1 ,nullptr },  // Inst #422 = ADBR
 4743   { 423,	3,	1,	2,	434,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo103, -1 ,nullptr },  // Inst #423 = ADR
 4744   { 424,	3,	1,	4,	497,	0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo104, -1 ,nullptr },  // Inst #424 = ADTR
 4745   { 425,	4,	1,	4,	497,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo105, -1 ,nullptr },  // Inst #425 = ADTRA
 4746   { 426,	5,	1,	4,	433,	0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo106, -1 ,nullptr },  // Inst #426 = AE
 4747   { 427,	5,	1,	6,	379,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fc88ULL, ImplicitList3, ImplicitList1, OperandInfo106, -1 ,nullptr },  // Inst #427 = AEB
 4748   { 428,	3,	1,	4,	380,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x3fc00ULL, ImplicitList3, ImplicitList1, OperandInfo107, -1 ,nullptr },  // Inst #428 = AEBR
 4749   { 429,	3,	1,	2,	434,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo107, -1 ,nullptr },  // Inst #429 = AER
 4750   { 430,	3,	1,	6,	106,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #430 = AFI
 4751   { 431,	5,	1,	6,	107,	0|(1ULL<<MCID::MayLoad), 0x23d0cULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #431 = AG
 4752   { 432,	5,	1,	6,	843,	0|(1ULL<<MCID::MayLoad), 0x23c8cULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #432 = AGF
 4753   { 433,	3,	1,	6,	108,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #433 = AGFI
 4754   { 434,	3,	1,	4,	128,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo110, -1 ,nullptr },  // Inst #434 = AGFR
 4755   { 435,	5,	1,	6,	127,	0|(1ULL<<MCID::MayLoad), 0x23c4cULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #435 = AGH
 4756   { 436,	3,	1,	4,	109,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #436 = AGHI
 4757   { 437,	3,	1,	6,	109,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #437 = AGHIK
 4758   { 438,	3,	1,	4,	110,	0|(1ULL<<MCID::Commutable), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo111, -1 ,nullptr },  // Inst #438 = AGR
 4759   { 439,	3,	1,	4,	110,	0|(1ULL<<MCID::Commutable), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo112, -1 ,nullptr },  // Inst #439 = AGRK
 4760   { 440,	3,	0,	6,	124,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x23c04ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #440 = AGSI
 4761   { 441,	5,	1,	4,	104,	0|(1ULL<<MCID::MayLoad), 0x23c48ULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #441 = AH
 4762   { 442,	3,	1,	4,	121,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo113, -1 ,nullptr },  // Inst #442 = AHHHR
 4763   { 443,	3,	1,	4,	122,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo114, -1 ,nullptr },  // Inst #443 = AHHLR
 4764   { 444,	3,	1,	4,	111,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #444 = AHI
 4765   { 445,	3,	1,	6,	111,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #445 = AHIK
 4766   { 446,	5,	1,	6,	104,	0|(1ULL<<MCID::MayLoad), 0x23c4cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #446 = AHY
 4767   { 447,	3,	1,	6,	105,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo115, -1 ,nullptr },  // Inst #447 = AIH
 4768   { 448,	5,	1,	4,	113,	0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #448 = AL
 4769   { 449,	5,	1,	6,	125,	0|(1ULL<<MCID::MayLoad), 0x8cULL, ImplicitList1, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #449 = ALC
 4769   { 449,	5,	1,	6,	125,	0|(1ULL<<MCID::MayLoad), 0x8cULL, ImplicitList1, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #449 = ALC
 4770   { 450,	5,	1,	6,	125,	0|(1ULL<<MCID::MayLoad), 0x10cULL, ImplicitList1, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #450 = ALCG
 4770   { 450,	5,	1,	6,	125,	0|(1ULL<<MCID::MayLoad), 0x10cULL, ImplicitList1, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #450 = ALCG
 4771   { 451,	3,	1,	4,	126,	0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo111, -1 ,nullptr },  // Inst #451 = ALCGR
 4771   { 451,	3,	1,	4,	126,	0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo111, -1 ,nullptr },  // Inst #451 = ALCGR
 4772   { 452,	3,	1,	4,	126,	0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #452 = ALCR
 4772   { 452,	3,	1,	4,	126,	0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #452 = ALCR
 4773   { 453,	3,	1,	6,	114,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #453 = ALFI
 4774   { 454,	5,	1,	6,	115,	0|(1ULL<<MCID::MayLoad), 0x10cULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #454 = ALG
 4775   { 455,	5,	1,	6,	861,	0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #455 = ALGF
 4776   { 456,	3,	1,	6,	117,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #456 = ALGFI
 4777   { 457,	3,	1,	4,	117,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo110, -1 ,nullptr },  // Inst #457 = ALGFR
 4778   { 458,	3,	1,	6,	116,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #458 = ALGHSIK
 4779   { 459,	3,	1,	4,	118,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo111, -1 ,nullptr },  // Inst #459 = ALGR
 4780   { 460,	3,	1,	4,	118,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo112, -1 ,nullptr },  // Inst #460 = ALGRK
 4781   { 461,	3,	0,	6,	124,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #461 = ALGSI
 4782   { 462,	3,	1,	4,	121,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo113, -1 ,nullptr },  // Inst #462 = ALHHHR
 4783   { 463,	3,	1,	4,	122,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo114, -1 ,nullptr },  // Inst #463 = ALHHLR
 4784   { 464,	3,	1,	6,	114,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #464 = ALHSIK
 4785   { 465,	3,	1,	2,	119,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #465 = ALR
 4786   { 466,	3,	1,	4,	119,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo117, -1 ,nullptr },  // Inst #466 = ALRK
 4787   { 467,	3,	0,	6,	860,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #467 = ALSI
 4788   { 468,	3,	1,	6,	123,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo115, -1 ,nullptr },  // Inst #468 = ALSIH
 4790   { 470,	5,	1,	6,	113,	0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #470 = ALY
 4791   { 471,	6,	0,	6,	304,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo118, -1 ,nullptr },  // Inst #471 = AP
 4792   { 472,	3,	1,	2,	120,	0|(1ULL<<MCID::Commutable), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #472 = AR
 4793   { 473,	3,	1,	4,	120,	0|(1ULL<<MCID::Commutable), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo117, -1 ,nullptr },  // Inst #473 = ARK
 4794   { 474,	3,	0,	6,	860,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x23c04ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #474 = ASI
 4795   { 475,	5,	1,	4,	433,	0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo106, -1 ,nullptr },  // Inst #475 = AU
 4796   { 476,	3,	1,	2,	434,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo107, -1 ,nullptr },  // Inst #476 = AUR
 4797   { 477,	5,	1,	4,	433,	0|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, ImplicitList1, OperandInfo102, -1 ,nullptr },  // Inst #477 = AW
 4798   { 478,	3,	1,	2,	434,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo103, -1 ,nullptr },  // Inst #478 = AWR
 4799   { 479,	3,	1,	4,	381,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x3fc00ULL, ImplicitList3, ImplicitList1, OperandInfo119, -1 ,nullptr },  // Inst #479 = AXBR
 4800   { 480,	3,	1,	2,	435,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo119, -1 ,nullptr },  // Inst #480 = AXR
 4801   { 481,	3,	1,	4,	498,	0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo120, -1 ,nullptr },  // Inst #481 = AXTR
 4802   { 482,	4,	1,	4,	498,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo121, -1 ,nullptr },  // Inst #482 = AXTRA
 4803   { 483,	5,	1,	6,	103,	0|(1ULL<<MCID::MayLoad), 0x23c8cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #483 = AY
 4806   { 486,	4,	0,	4,	317,	0|(1ULL<<MCID::Call), 0x8ULL, ImplicitList1, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #486 = BAL
 4806   { 486,	4,	0,	4,	317,	0|(1ULL<<MCID::Call), 0x8ULL, ImplicitList1, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #486 = BAL
 4807   { 487,	2,	0,	2,	317,	0|(1ULL<<MCID::Call), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo124, -1 ,nullptr },  // Inst #487 = BALR
 4807   { 487,	2,	0,	2,	317,	0|(1ULL<<MCID::Call), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo124, -1 ,nullptr },  // Inst #487 = BALR
 4808   { 488,	4,	0,	4,	20,	0|(1ULL<<MCID::Call), 0x8ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #488 = BAS
 4809   { 489,	2,	0,	2,	20,	0|(1ULL<<MCID::Call), 0x0ULL, nullptr, ImplicitList1, OperandInfo124, -1 ,nullptr },  // Inst #489 = BASR
 4810   { 490,	2,	0,	2,	321,	0|(1ULL<<MCID::Call), 0x0ULL, nullptr, ImplicitList1, OperandInfo124, -1 ,nullptr },  // Inst #490 = BASSM
 4811   { 491,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #491 = BAsmE
 4812   { 492,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #492 = BAsmH
 4813   { 493,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #493 = BAsmHE
 4814   { 494,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #494 = BAsmL
 4815   { 495,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #495 = BAsmLE
 4816   { 496,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #496 = BAsmLH
 4817   { 497,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #497 = BAsmM
 4818   { 498,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #498 = BAsmNE
 4819   { 499,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #499 = BAsmNH
 4820   { 500,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #500 = BAsmNHE
 4821   { 501,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #501 = BAsmNL
 4822   { 502,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #502 = BAsmNLE
 4823   { 503,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #503 = BAsmNLH
 4824   { 504,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #504 = BAsmNM
 4825   { 505,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #505 = BAsmNO
 4826   { 506,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #506 = BAsmNP
 4827   { 507,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #507 = BAsmNZ
 4828   { 508,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #508 = BAsmO
 4829   { 509,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #509 = BAsmP
 4830   { 510,	3,	0,	4,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #510 = BAsmZ
 4831   { 511,	5,	0,	4,	4,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x40008ULL, ImplicitList1, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #511 = BC
 4832   { 512,	4,	0,	4,	4,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #512 = BCAsm
 4833   { 513,	3,	0,	2,	4,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x40000ULL, ImplicitList1, nullptr, OperandInfo127, -1 ,nullptr },  // Inst #513 = BCR
 4834   { 514,	2,	0,	2,	4,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo128, -1 ,nullptr },  // Inst #514 = BCRAsm
 4840   { 520,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #520 = BIAsmE
 4841   { 521,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #521 = BIAsmH
 4842   { 522,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #522 = BIAsmHE
 4843   { 523,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #523 = BIAsmL
 4844   { 524,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #524 = BIAsmLE
 4845   { 525,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #525 = BIAsmLH
 4846   { 526,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #526 = BIAsmM
 4847   { 527,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #527 = BIAsmNE
 4848   { 528,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #528 = BIAsmNH
 4849   { 529,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #529 = BIAsmNHE
 4850   { 530,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #530 = BIAsmNL
 4851   { 531,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #531 = BIAsmNLE
 4852   { 532,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #532 = BIAsmNLH
 4853   { 533,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #533 = BIAsmNM
 4854   { 534,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #534 = BIAsmNO
 4855   { 535,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #535 = BIAsmNP
 4856   { 536,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #536 = BIAsmNZ
 4857   { 537,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #537 = BIAsmO
 4858   { 538,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #538 = BIAsmP
 4859   { 539,	3,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #539 = BIAsmZ
 4860   { 540,	5,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x4000cULL, ImplicitList1, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #540 = BIC
 4861   { 541,	4,	0,	6,	6,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #541 = BICAsm
 4865   { 545,	3,	0,	4,	18,	0|(1ULL<<MCID::Call), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #545 = BRAS
 4866   { 546,	3,	0,	6,	19,	0|(1ULL<<MCID::Call), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #546 = BRASL
 4867   { 547,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #547 = BRAsmE
 4868   { 548,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #548 = BRAsmH
 4869   { 549,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #549 = BRAsmHE
 4870   { 550,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #550 = BRAsmL
 4871   { 551,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #551 = BRAsmLE
 4872   { 552,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #552 = BRAsmLH
 4873   { 553,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #553 = BRAsmM
 4874   { 554,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #554 = BRAsmNE
 4875   { 555,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #555 = BRAsmNH
 4876   { 556,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #556 = BRAsmNHE
 4877   { 557,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #557 = BRAsmNL
 4878   { 558,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #558 = BRAsmNLE
 4879   { 559,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #559 = BRAsmNLH
 4880   { 560,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #560 = BRAsmNM
 4881   { 561,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #561 = BRAsmNO
 4882   { 562,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #562 = BRAsmNP
 4883   { 563,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #563 = BRAsmNZ
 4884   { 564,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #564 = BRAsmO
 4885   { 565,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #565 = BRAsmP
 4886   { 566,	1,	0,	2,	5,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #566 = BRAsmZ
 4887   { 567,	3,	0,	4,	2,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x40000ULL, ImplicitList1, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #567 = BRC
 4888   { 568,	2,	0,	4,	2,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #568 = BRCAsm
 4889   { 569,	3,	0,	6,	2,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x40000ULL, ImplicitList1, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #569 = BRCL
 4890   { 570,	2,	0,	6,	2,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #570 = BRCLAsm
 4891   { 571,	3,	1,	4,	7,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #571 = BRCT
 4892   { 572,	3,	1,	4,	7,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #572 = BRCTG
 4894   { 574,	4,	1,	4,	10,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo130, -1 ,nullptr },  // Inst #574 = BRXH
 4895   { 575,	4,	1,	6,	10,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo131, -1 ,nullptr },  // Inst #575 = BRXHG
 4896   { 576,	4,	1,	4,	10,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo130, -1 ,nullptr },  // Inst #576 = BRXLE
 4897   { 577,	4,	1,	6,	10,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo131, -1 ,nullptr },  // Inst #577 = BRXLG
 4905   { 585,	4,	0,	4,	218,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3888ULL, nullptr, ImplicitList1, OperandInfo134, -1 ,nullptr },  // Inst #585 = C
 4906   { 586,	4,	0,	4,	457,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, ImplicitList1, OperandInfo135, -1 ,nullptr },  // Inst #586 = CD
 4907   { 587,	4,	0,	6,	398,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3d08ULL, ImplicitList3, ImplicitList1, OperandInfo135, -1 ,nullptr },  // Inst #587 = CDB
 4908   { 588,	2,	0,	4,	399,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL, ImplicitList3, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #588 = CDBR
 4923   { 603,	2,	0,	2,	458,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #603 = CDR
 4924   { 604,	5,	1,	4,	275,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo141, -1 ,nullptr },  // Inst #604 = CDS
 4925   { 605,	5,	1,	6,	276,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo141, -1 ,nullptr },  // Inst #605 = CDSG
 4927   { 607,	5,	1,	6,	275,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo141, -1 ,nullptr },  // Inst #607 = CDSY
 4928   { 608,	2,	0,	4,	513,	0|(1ULL<<MCID::Compare), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #608 = CDTR
 4931   { 611,	4,	0,	4,	457,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo142, -1 ,nullptr },  // Inst #611 = CE
 4932   { 612,	4,	0,	6,	398,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3c88ULL, ImplicitList3, ImplicitList1, OperandInfo142, -1 ,nullptr },  // Inst #612 = CEB
 4933   { 613,	2,	0,	4,	399,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL, ImplicitList3, ImplicitList1, OperandInfo75, -1 ,nullptr },  // Inst #613 = CEBR
 4934   { 614,	2,	0,	4,	515,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #614 = CEDTR
 4943   { 623,	2,	0,	2,	458,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo75, -1 ,nullptr },  // Inst #623 = CER
 4944   { 624,	2,	0,	4,	516,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #624 = CEXTR
 4946   { 626,	3,	1,	4,	365,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo148, -1 ,nullptr },  // Inst #626 = CFDBR
 4947   { 627,	4,	1,	4,	365,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo149, -1 ,nullptr },  // Inst #627 = CFDBRA
 4948   { 628,	3,	1,	4,	421,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo148, -1 ,nullptr },  // Inst #628 = CFDR
 4949   { 629,	4,	1,	4,	866,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo149, -1 ,nullptr },  // Inst #629 = CFDTR
 4950   { 630,	3,	1,	4,	365,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo150, -1 ,nullptr },  // Inst #630 = CFEBR
 4951   { 631,	4,	1,	4,	365,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo151, -1 ,nullptr },  // Inst #631 = CFEBRA
 4952   { 632,	3,	1,	4,	421,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo150, -1 ,nullptr },  // Inst #632 = CFER
 4953   { 633,	2,	0,	6,	220,	0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo152, -1 ,nullptr },  // Inst #633 = CFI
 4954   { 634,	3,	1,	4,	366,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo153, -1 ,nullptr },  // Inst #634 = CFXBR
 4955   { 635,	4,	1,	4,	366,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo154, -1 ,nullptr },  // Inst #635 = CFXBRA
 4956   { 636,	3,	1,	4,	422,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo153, -1 ,nullptr },  // Inst #636 = CFXR
 4957   { 637,	4,	1,	4,	867,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo154, -1 ,nullptr },  // Inst #637 = CFXTR
 4958   { 638,	4,	0,	6,	218,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x390cULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #638 = CG
 4959   { 639,	3,	1,	4,	365,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo155, -1 ,nullptr },  // Inst #639 = CGDBR
 4960   { 640,	4,	1,	4,	365,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo156, -1 ,nullptr },  // Inst #640 = CGDBRA
 4961   { 641,	3,	1,	4,	421,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo155, -1 ,nullptr },  // Inst #641 = CGDR
 4962   { 642,	3,	1,	4,	474,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo155, -1 ,nullptr },  // Inst #642 = CGDTR
 4963   { 643,	4,	1,	4,	474,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo156, -1 ,nullptr },  // Inst #643 = CGDTRA
 4964   { 644,	3,	1,	4,	365,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo157, -1 ,nullptr },  // Inst #644 = CGEBR
 4965   { 645,	4,	1,	4,	365,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo158, -1 ,nullptr },  // Inst #645 = CGEBRA
 4966   { 646,	3,	1,	4,	421,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo157, -1 ,nullptr },  // Inst #646 = CGER
 4967   { 647,	4,	0,	6,	250,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #647 = CGF
 4968   { 648,	2,	0,	6,	221,	0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #648 = CGFI
 4969   { 649,	2,	0,	4,	252,	0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo159, -1 ,nullptr },  // Inst #649 = CGFR
 4970   { 650,	2,	0,	6,	251,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #650 = CGFRL
 4971   { 651,	4,	0,	6,	247,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x384cULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #651 = CGH
 4972   { 652,	2,	0,	4,	221,	0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #652 = CGHI
 4973   { 653,	2,	0,	6,	248,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #653 = CGHRL
 4974   { 654,	3,	0,	6,	222,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #654 = CGHSI
 4989   { 669,	4,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo162, -1 ,nullptr },  // Inst #669 = CGIJ
 4990   { 670,	4,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo162, -1 ,nullptr },  // Inst #670 = CGIJAsm
 4991   { 671,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #671 = CGIJAsmE
 4992   { 672,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #672 = CGIJAsmH
 4993   { 673,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #673 = CGIJAsmHE
 4994   { 674,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #674 = CGIJAsmL
 4995   { 675,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #675 = CGIJAsmLE
 4996   { 676,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #676 = CGIJAsmLH
 4997   { 677,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #677 = CGIJAsmNE
 4998   { 678,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #678 = CGIJAsmNH
 4999   { 679,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #679 = CGIJAsmNHE
 5000   { 680,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #680 = CGIJAsmNL
 5001   { 681,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #681 = CGIJAsmNLE
 5002   { 682,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #682 = CGIJAsmNLH
 5017   { 697,	2,	0,	4,	223,	0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #697 = CGR
 5032   { 712,	4,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo165, -1 ,nullptr },  // Inst #712 = CGRJ
 5033   { 713,	4,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo165, -1 ,nullptr },  // Inst #713 = CGRJAsm
 5034   { 714,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #714 = CGRJAsmE
 5035   { 715,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #715 = CGRJAsmH
 5036   { 716,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #716 = CGRJAsmHE
 5037   { 717,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #717 = CGRJAsmL
 5038   { 718,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #718 = CGRJAsmLE
 5039   { 719,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #719 = CGRJAsmLH
 5040   { 720,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #720 = CGRJAsmNE
 5041   { 721,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #721 = CGRJAsmNH
 5042   { 722,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #722 = CGRJAsmNHE
 5043   { 723,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #723 = CGRJAsmNL
 5044   { 724,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #724 = CGRJAsmNLE
 5045   { 725,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #725 = CGRJAsmNLH
 5046   { 726,	2,	0,	6,	222,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #726 = CGRL
 5061   { 741,	3,	1,	4,	366,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo166, -1 ,nullptr },  // Inst #741 = CGXBR
 5062   { 742,	4,	1,	4,	366,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo167, -1 ,nullptr },  // Inst #742 = CGXBRA
 5063   { 743,	3,	1,	4,	422,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo166, -1 ,nullptr },  // Inst #743 = CGXR
 5064   { 744,	3,	1,	4,	475,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo166, -1 ,nullptr },  // Inst #744 = CGXTR
 5065   { 745,	4,	1,	4,	475,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo167, -1 ,nullptr },  // Inst #745 = CGXTRA
 5066   { 746,	4,	0,	4,	245,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3848ULL, nullptr, ImplicitList1, OperandInfo134, -1 ,nullptr },  // Inst #746 = CH
 5067   { 747,	4,	0,	6,	225,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL, nullptr, ImplicitList1, OperandInfo168, -1 ,nullptr },  // Inst #747 = CHF
 5068   { 748,	2,	0,	4,	243,	0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo169, -1 ,nullptr },  // Inst #748 = CHHR
 5069   { 749,	3,	0,	6,	249,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #749 = CHHSI
 5070   { 750,	2,	0,	4,	220,	0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo152, -1 ,nullptr },  // Inst #750 = CHI
 5071   { 751,	2,	0,	4,	244,	0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo170, -1 ,nullptr },  // Inst #751 = CHLR
 5072   { 752,	2,	0,	6,	246,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo152, -1 ,nullptr },  // Inst #752 = CHRL
 5073   { 753,	3,	0,	6,	226,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #753 = CHSI
 5074   { 754,	4,	0,	6,	245,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x384cULL, nullptr, ImplicitList1, OperandInfo134, -1 ,nullptr },  // Inst #754 = CHY
 5089   { 769,	2,	0,	6,	224,	0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo173, -1 ,nullptr },  // Inst #769 = CIH
 5090   { 770,	4,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo174, -1 ,nullptr },  // Inst #770 = CIJ
 5091   { 771,	4,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo174, -1 ,nullptr },  // Inst #771 = CIJAsm
 5092   { 772,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #772 = CIJAsmE
 5093   { 773,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #773 = CIJAsmH
 5094   { 774,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #774 = CIJAsmHE
 5095   { 775,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #775 = CIJAsmL
 5096   { 776,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #776 = CIJAsmLE
 5097   { 777,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #777 = CIJAsmLH
 5098   { 778,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #778 = CIJAsmNE
 5099   { 779,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #779 = CIJAsmNH
 5100   { 780,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #780 = CIJAsmNHE
 5101   { 781,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #781 = CIJAsmNL
 5102   { 782,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #782 = CIJAsmNLE
 5103   { 783,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #783 = CIJAsmNLH
 5118   { 798,	4,	2,	4,	334,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo175, -1 ,nullptr },  // Inst #798 = CKSM
 5119   { 799,	4,	0,	4,	227,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103888ULL, nullptr, ImplicitList1, OperandInfo134, -1 ,nullptr },  // Inst #799 = CL
 5120   { 800,	5,	0,	6,	253,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo176, -1 ,nullptr },  // Inst #800 = CLC
 5121   { 801,	4,	2,	2,	254,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #801 = CLCL
 5122   { 802,	6,	2,	4,	254,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo178, -1 ,nullptr },  // Inst #802 = CLCLE
 5123   { 803,	6,	2,	6,	254,	0|(1ULL<<MCID::MayLoad), 0x4ULL, nullptr, ImplicitList1, OperandInfo178, -1 ,nullptr },  // Inst #803 = CLCLU
 5124   { 804,	4,	1,	4,	368,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo149, -1 ,nullptr },  // Inst #804 = CLFDBR
 5125   { 805,	4,	1,	4,	476,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo149, -1 ,nullptr },  // Inst #805 = CLFDTR
 5126   { 806,	4,	1,	4,	367,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo151, -1 ,nullptr },  // Inst #806 = CLFEBR
 5127   { 807,	3,	0,	6,	228,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #807 = CLFHSI
 5128   { 808,	2,	0,	6,	229,	0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo152, -1 ,nullptr },  // Inst #808 = CLFI
 5143   { 823,	4,	1,	4,	370,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo154, -1 ,nullptr },  // Inst #823 = CLFXBR
 5144   { 824,	4,	1,	4,	477,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo154, -1 ,nullptr },  // Inst #824 = CLFXTR
 5145   { 825,	4,	0,	6,	230,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10390cULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #825 = CLG
 5146   { 826,	4,	1,	4,	369,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo156, -1 ,nullptr },  // Inst #826 = CLGDBR
 5147   { 827,	4,	1,	4,	476,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo156, -1 ,nullptr },  // Inst #827 = CLGDTR
 5148   { 828,	4,	1,	4,	369,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo158, -1 ,nullptr },  // Inst #828 = CLGEBR
 5149   { 829,	4,	0,	6,	232,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10388cULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #829 = CLGF
 5150   { 830,	2,	0,	6,	234,	0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #830 = CLGFI
 5151   { 831,	2,	0,	4,	234,	0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo159, -1 ,nullptr },  // Inst #831 = CLGFR
 5152   { 832,	2,	0,	6,	233,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #832 = CLGFRL
 5153   { 833,	2,	0,	6,	231,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #833 = CLGHRL
 5154   { 834,	3,	0,	6,	231,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #834 = CLGHSI
 5169   { 849,	4,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo162, -1 ,nullptr },  // Inst #849 = CLGIJ
 5170   { 850,	4,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo162, -1 ,nullptr },  // Inst #850 = CLGIJAsm
 5171   { 851,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #851 = CLGIJAsmE
 5172   { 852,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #852 = CLGIJAsmH
 5173   { 853,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #853 = CLGIJAsmHE
 5174   { 854,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #854 = CLGIJAsmL
 5175   { 855,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #855 = CLGIJAsmLE
 5176   { 856,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #856 = CLGIJAsmLH
 5177   { 857,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #857 = CLGIJAsmNE
 5178   { 858,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #858 = CLGIJAsmNH
 5179   { 859,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #859 = CLGIJAsmNHE
 5180   { 860,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #860 = CLGIJAsmNL
 5181   { 861,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #861 = CLGIJAsmNLE
 5182   { 862,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #862 = CLGIJAsmNLH
 5197   { 877,	2,	0,	4,	235,	0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #877 = CLGR
 5212   { 892,	4,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo165, -1 ,nullptr },  // Inst #892 = CLGRJ
 5213   { 893,	4,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo165, -1 ,nullptr },  // Inst #893 = CLGRJAsm
 5214   { 894,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #894 = CLGRJAsmE
 5215   { 895,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #895 = CLGRJAsmH
 5216   { 896,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #896 = CLGRJAsmHE
 5217   { 897,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #897 = CLGRJAsmL
 5218   { 898,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #898 = CLGRJAsmLE
 5219   { 899,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #899 = CLGRJAsmLH
 5220   { 900,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #900 = CLGRJAsmNE
 5221   { 901,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #901 = CLGRJAsmNH
 5222   { 902,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #902 = CLGRJAsmNHE
 5223   { 903,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #903 = CLGRJAsmNL
 5224   { 904,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #904 = CLGRJAsmNLE
 5225   { 905,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #905 = CLGRJAsmNLH
 5226   { 906,	2,	0,	6,	236,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #906 = CLGRL
 5255   { 935,	4,	1,	4,	370,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo167, -1 ,nullptr },  // Inst #935 = CLGXBR
 5256   { 936,	4,	1,	4,	477,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo167, -1 ,nullptr },  // Inst #936 = CLGXTR
 5257   { 937,	4,	0,	6,	237,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10388cULL, nullptr, ImplicitList1, OperandInfo168, -1 ,nullptr },  // Inst #937 = CLHF
 5258   { 938,	2,	0,	4,	243,	0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo169, -1 ,nullptr },  // Inst #938 = CLHHR
 5259   { 939,	3,	0,	6,	238,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #939 = CLHHSI
 5260   { 940,	2,	0,	4,	244,	0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo170, -1 ,nullptr },  // Inst #940 = CLHLR
 5261   { 941,	2,	0,	6,	238,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo152, -1 ,nullptr },  // Inst #941 = CLHRL
 5262   { 942,	3,	0,	4,	240,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #942 = CLI
 5277   { 957,	2,	0,	6,	239,	0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo173, -1 ,nullptr },  // Inst #957 = CLIH
 5278   { 958,	4,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo174, -1 ,nullptr },  // Inst #958 = CLIJ
 5279   { 959,	4,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo174, -1 ,nullptr },  // Inst #959 = CLIJAsm
 5280   { 960,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #960 = CLIJAsmE
 5281   { 961,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #961 = CLIJAsmH
 5282   { 962,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #962 = CLIJAsmHE
 5283   { 963,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #963 = CLIJAsmL
 5284   { 964,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #964 = CLIJAsmLE
 5285   { 965,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #965 = CLIJAsmLH
 5286   { 966,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #966 = CLIJAsmNE
 5287   { 967,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #967 = CLIJAsmNH
 5288   { 968,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #968 = CLIJAsmNHE
 5289   { 969,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #969 = CLIJAsmNL
 5290   { 970,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #970 = CLIJAsmNLE
 5291   { 971,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo52, -1 ,nullptr },  // Inst #971 = CLIJAsmNLH
 5292   { 972,	3,	0,	6,	240,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103804ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #972 = CLIY
 5293   { 973,	4,	0,	4,	262,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr },  // Inst #973 = CLM
 5294   { 974,	4,	0,	6,	262,	0|(1ULL<<MCID::MayLoad), 0x4ULL, nullptr, ImplicitList1, OperandInfo180, -1 ,nullptr },  // Inst #974 = CLMH
 5295   { 975,	4,	0,	6,	262,	0|(1ULL<<MCID::MayLoad), 0x4ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr },  // Inst #975 = CLMY
 5296   { 976,	2,	0,	2,	241,	0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo181, -1 ,nullptr },  // Inst #976 = CLR
 5311   { 991,	4,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo184, -1 ,nullptr },  // Inst #991 = CLRJ
 5312   { 992,	4,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo184, -1 ,nullptr },  // Inst #992 = CLRJAsm
 5313   { 993,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #993 = CLRJAsmE
 5314   { 994,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #994 = CLRJAsmH
 5315   { 995,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #995 = CLRJAsmHE
 5316   { 996,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #996 = CLRJAsmL
 5317   { 997,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #997 = CLRJAsmLE
 5318   { 998,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #998 = CLRJAsmLH
 5319   { 999,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #999 = CLRJAsmNE
 5320   { 1000,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1000 = CLRJAsmNH
 5321   { 1001,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1001 = CLRJAsmNHE
 5322   { 1002,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1002 = CLRJAsmNL
 5323   { 1003,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1003 = CLRJAsmNLE
 5324   { 1004,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1004 = CLRJAsmNLH
 5325   { 1005,	2,	0,	6,	242,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo152, -1 ,nullptr },  // Inst #1005 = CLRL
 5340   { 1020,	4,	2,	4,	255,	0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList7, ImplicitList1, OperandInfo185, -1 ,nullptr },  // Inst #1020 = CLST
 5355   { 1035,	4,	0,	6,	227,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10388cULL, nullptr, ImplicitList1, OperandInfo134, -1 ,nullptr },  // Inst #1035 = CLY
 5357   { 1037,	6,	0,	6,	308,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo118, -1 ,nullptr },  // Inst #1037 = CP
 5365   { 1045,	2,	0,	2,	223,	0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo181, -1 ,nullptr },  // Inst #1045 = CR
 5380   { 1060,	4,	0,	4,	778,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo192, -1 ,nullptr },  // Inst #1060 = CRDTE
 5381   { 1061,	3,	0,	4,	778,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo193, -1 ,nullptr },  // Inst #1061 = CRDTEOpt
 5382   { 1062,	4,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo184, -1 ,nullptr },  // Inst #1062 = CRJ
 5383   { 1063,	4,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo184, -1 ,nullptr },  // Inst #1063 = CRJAsm
 5384   { 1064,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1064 = CRJAsmE
 5385   { 1065,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1065 = CRJAsmH
 5386   { 1066,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1066 = CRJAsmHE
 5387   { 1067,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1067 = CRJAsmL
 5388   { 1068,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1068 = CRJAsmLE
 5389   { 1069,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1069 = CRJAsmLH
 5390   { 1070,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1070 = CRJAsmNE
 5391   { 1071,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1071 = CRJAsmNH
 5392   { 1072,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1072 = CRJAsmNHE
 5393   { 1073,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1073 = CRJAsmNL
 5394   { 1074,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1074 = CRJAsmNLE
 5395   { 1075,	3,	0,	6,	11,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo56, -1 ,nullptr },  // Inst #1075 = CRJAsmNLH
 5396   { 1076,	2,	0,	6,	219,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo152, -1 ,nullptr },  // Inst #1076 = CRL
 5411   { 1091,	5,	1,	4,	274,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo132, -1 ,nullptr },  // Inst #1091 = CS
 5412   { 1092,	0,	0,	4,	831,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList10, ImplicitList1, nullptr, -1 ,nullptr },  // Inst #1092 = CSCH
 5414   { 1094,	5,	1,	6,	274,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo133, -1 ,nullptr },  // Inst #1094 = CSG
 5415   { 1095,	3,	1,	4,	780,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo195, -1 ,nullptr },  // Inst #1095 = CSP
 5416   { 1096,	3,	1,	4,	780,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo195, -1 ,nullptr },  // Inst #1096 = CSPG
 5417   { 1097,	5,	0,	6,	277,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo196, -1 ,nullptr },  // Inst #1097 = CSST
 5419   { 1099,	5,	1,	6,	274,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo132, -1 ,nullptr },  // Inst #1099 = CSY
 5420   { 1100,	5,	2,	4,	288,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo198, -1 ,nullptr },  // Inst #1100 = CU12
 5421   { 1101,	4,	2,	4,	288,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #1101 = CU12Opt
 5422   { 1102,	5,	2,	4,	288,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo198, -1 ,nullptr },  // Inst #1102 = CU14
 5423   { 1103,	4,	2,	4,	288,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #1103 = CU14Opt
 5424   { 1104,	5,	2,	4,	288,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo198, -1 ,nullptr },  // Inst #1104 = CU21
 5425   { 1105,	4,	2,	4,	288,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #1105 = CU21Opt
 5426   { 1106,	5,	2,	4,	288,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo198, -1 ,nullptr },  // Inst #1106 = CU24
 5427   { 1107,	4,	2,	4,	288,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #1107 = CU24Opt
 5428   { 1108,	4,	2,	4,	288,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #1108 = CU41
 5429   { 1109,	4,	2,	4,	288,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #1109 = CU42
 5431   { 1111,	4,	2,	4,	331,	0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList11, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #1111 = CUSE
 5432   { 1112,	5,	2,	4,	289,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo198, -1 ,nullptr },  // Inst #1112 = CUTFU
 5433   { 1113,	4,	2,	4,	289,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #1113 = CUTFUOpt
 5434   { 1114,	5,	2,	4,	289,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo198, -1 ,nullptr },  // Inst #1114 = CUUTF
 5435   { 1115,	4,	2,	4,	289,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #1115 = CUUTFOpt
 5443   { 1123,	2,	0,	4,	400,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL, ImplicitList3, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #1123 = CXBR
 5458   { 1138,	2,	0,	4,	459,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #1138 = CXR
 5460   { 1140,	2,	0,	4,	514,	0|(1ULL<<MCID::Compare), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #1140 = CXTR
 5463   { 1143,	4,	0,	6,	218,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL, nullptr, ImplicitList1, OperandInfo134, -1 ,nullptr },  // Inst #1143 = CY
 5477   { 1157,	5,	2,	4,	337,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo207, -1 ,nullptr },  // Inst #1157 = DFLTCC
 5479   { 1159,	5,	2,	4,	397,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo208, -1 ,nullptr },  // Inst #1159 = DIDBR
 5480   { 1160,	5,	2,	4,	397,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo209, -1 ,nullptr },  // Inst #1160 = DIEBR
 5497   { 1177,	2,	1,	4,	826,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #1177 = ECCTR
 5498   { 1178,	2,	1,	4,	825,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo213, -1 ,nullptr },  // Inst #1178 = ECPGA
 5500   { 1180,	5,	0,	6,	310,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo176, -1 ,nullptr },  // Inst #1180 = ED
 5501   { 1181,	5,	0,	6,	310,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo176, -1 ,nullptr },  // Inst #1181 = EDMK
 5507   { 1187,	2,	1,	4,	826,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #1187 = EPCTR
 5508   { 1188,	2,	2,	4,	753,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo181, -1 ,nullptr },  // Inst #1188 = EPSW
 5515   { 1195,	2,	1,	4,	801,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo216, -1 ,nullptr },  // Inst #1195 = ESTA
 5531   { 1211,	2,	1,	4,	328,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #1211 = FLOGR
 5534   { 1214,	0,	0,	4,	831,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList10, ImplicitList1, nullptr, -1 ,nullptr },  // Inst #1214 = HSCH
 5539   { 1219,	5,	1,	4,	95,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo223, -1 ,nullptr },  // Inst #1219 = ICM
 5540   { 1220,	5,	1,	6,	95,	0|(1ULL<<MCID::MayLoad), 0x4ULL, nullptr, ImplicitList1, OperandInfo224, -1 ,nullptr },  // Inst #1220 = ICMH
 5541   { 1221,	5,	1,	6,	95,	0|(1ULL<<MCID::MayLoad), 0x4ULL, nullptr, ImplicitList1, OperandInfo223, -1 ,nullptr },  // Inst #1221 = ICMY
 5554   { 1234,	1,	1,	4,	315,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1234 = IPM
 5587   { 1267,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1267 = JAsmE
 5588   { 1268,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1268 = JAsmH
 5589   { 1269,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1269 = JAsmHE
 5590   { 1270,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1270 = JAsmL
 5591   { 1271,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1271 = JAsmLE
 5592   { 1272,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1272 = JAsmLH
 5593   { 1273,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1273 = JAsmM
 5594   { 1274,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1274 = JAsmNE
 5595   { 1275,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1275 = JAsmNH
 5596   { 1276,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1276 = JAsmNHE
 5597   { 1277,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1277 = JAsmNL
 5598   { 1278,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1278 = JAsmNLE
 5599   { 1279,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1279 = JAsmNLH
 5600   { 1280,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1280 = JAsmNM
 5601   { 1281,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1281 = JAsmNO
 5602   { 1282,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1282 = JAsmNP
 5603   { 1283,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1283 = JAsmNZ
 5604   { 1284,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1284 = JAsmO
 5605   { 1285,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1285 = JAsmP
 5606   { 1286,	1,	0,	4,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1286 = JAsmZ
 5608   { 1288,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1288 = JGAsmE
 5609   { 1289,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1289 = JGAsmH
 5610   { 1290,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1290 = JGAsmHE
 5611   { 1291,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1291 = JGAsmL
 5612   { 1292,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1292 = JGAsmLE
 5613   { 1293,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1293 = JGAsmLH
 5614   { 1294,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1294 = JGAsmM
 5615   { 1295,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1295 = JGAsmNE
 5616   { 1296,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1296 = JGAsmNH
 5617   { 1297,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1297 = JGAsmNHE
 5618   { 1298,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1298 = JGAsmNL
 5619   { 1299,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1299 = JGAsmNLE
 5620   { 1300,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1300 = JGAsmNLH
 5621   { 1301,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1301 = JGAsmNM
 5622   { 1302,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1302 = JGAsmNO
 5623   { 1303,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1303 = JGAsmNP
 5624   { 1304,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1304 = JGAsmNZ
 5625   { 1305,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1305 = JGAsmO
 5626   { 1306,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1306 = JGAsmP
 5627   { 1307,	1,	0,	6,	3,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1307 = JGAsmZ
 5628   { 1308,	4,	0,	6,	398,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3d08ULL, ImplicitList3, ImplicitList1, OperandInfo135, -1 ,nullptr },  // Inst #1308 = KDB
 5629   { 1309,	2,	0,	4,	399,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL, ImplicitList3, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #1309 = KDBR
 5630   { 1310,	3,	1,	4,	291,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo242, -1 ,nullptr },  // Inst #1310 = KDSA
 5631   { 1311,	2,	0,	4,	513,	0|(1ULL<<MCID::Compare), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #1311 = KDTR
 5632   { 1312,	4,	0,	6,	398,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3c88ULL, ImplicitList3, ImplicitList1, OperandInfo142, -1 ,nullptr },  // Inst #1312 = KEB
 5633   { 1313,	2,	0,	4,	399,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL, ImplicitList3, ImplicitList1, OperandInfo75, -1 ,nullptr },  // Inst #1313 = KEBR
 5634   { 1314,	3,	1,	4,	838,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo242, -1 ,nullptr },  // Inst #1314 = KIMD
 5635   { 1315,	3,	1,	4,	838,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo242, -1 ,nullptr },  // Inst #1315 = KLMD
 5636   { 1316,	4,	2,	4,	845,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #1316 = KM
 5637   { 1317,	6,	3,	4,	290,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo243, -1 ,nullptr },  // Inst #1317 = KMA
 5638   { 1318,	3,	1,	4,	838,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo242, -1 ,nullptr },  // Inst #1318 = KMAC
 5639   { 1319,	4,	2,	4,	845,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #1319 = KMC
 5640   { 1320,	6,	3,	4,	845,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo243, -1 ,nullptr },  // Inst #1320 = KMCTR
 5641   { 1321,	4,	2,	4,	845,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #1321 = KMF
 5642   { 1322,	4,	2,	4,	845,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #1322 = KMO
 5643   { 1323,	2,	0,	4,	400,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL, ImplicitList3, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #1323 = KXBR
 5644   { 1324,	2,	0,	4,	514,	0|(1ULL<<MCID::Compare), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #1324 = KXTR
 5647   { 1327,	4,	1,	6,	268,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo183, -1 ,nullptr },  // Inst #1327 = LAA
 5648   { 1328,	4,	1,	6,	268,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo164, -1 ,nullptr },  // Inst #1328 = LAAG
 5649   { 1329,	4,	1,	6,	269,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo183, -1 ,nullptr },  // Inst #1329 = LAAL
 5650   { 1330,	4,	1,	6,	269,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo164, -1 ,nullptr },  // Inst #1330 = LAALG
 5655   { 1335,	4,	1,	6,	270,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo183, -1 ,nullptr },  // Inst #1335 = LAN
 5656   { 1336,	4,	1,	6,	270,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo164, -1 ,nullptr },  // Inst #1336 = LANG
 5657   { 1337,	4,	1,	6,	271,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo183, -1 ,nullptr },  // Inst #1337 = LAO
 5658   { 1338,	4,	1,	6,	271,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo164, -1 ,nullptr },  // Inst #1338 = LAOG
 5660   { 1340,	4,	0,	6,	791,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo245, -1 ,nullptr },  // Inst #1340 = LASP
 5662   { 1342,	4,	1,	6,	272,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo183, -1 ,nullptr },  // Inst #1342 = LAX
 5663   { 1343,	4,	1,	6,	272,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo164, -1 ,nullptr },  // Inst #1343 = LAXG
 5668   { 1348,	5,	1,	6,	34,	0, 0x8ULL, nullptr, ImplicitList1, OperandInfo246, -1 ,nullptr },  // Inst #1348 = LCBB
 5669   { 1349,	2,	0,	4,	827,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #1349 = LCCTL
 5670   { 1350,	2,	1,	4,	371,	0, 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #1350 = LCDBR
 5673   { 1353,	2,	1,	2,	425,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #1353 = LCDR
 5674   { 1354,	2,	1,	4,	371,	0, 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo75, -1 ,nullptr },  // Inst #1354 = LCEBR
 5675   { 1355,	2,	1,	2,	425,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo75, -1 ,nullptr },  // Inst #1355 = LCER
 5676   { 1356,	2,	1,	4,	92,	0, 0x3b800ULL, nullptr, ImplicitList1, OperandInfo159, -1 ,nullptr },  // Inst #1356 = LCGFR
 5677   { 1357,	2,	1,	4,	91,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #1357 = LCGR
 5678   { 1358,	2,	1,	2,	91,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo181, -1 ,nullptr },  // Inst #1358 = LCR
 5681   { 1361,	2,	1,	4,	373,	0, 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #1361 = LCXBR
 5682   { 1362,	2,	1,	4,	426,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #1362 = LCXR
 5767   { 1447,	2,	1,	4,	371,	0, 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #1447 = LNDBR
 5770   { 1450,	2,	1,	2,	425,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #1450 = LNDR
 5771   { 1451,	2,	1,	4,	371,	0, 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo75, -1 ,nullptr },  // Inst #1451 = LNEBR
 5772   { 1452,	2,	1,	2,	425,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo75, -1 ,nullptr },  // Inst #1452 = LNER
 5773   { 1453,	2,	1,	4,	89,	0, 0x3b800ULL, nullptr, ImplicitList1, OperandInfo159, -1 ,nullptr },  // Inst #1453 = LNGFR
 5774   { 1454,	2,	1,	4,	90,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #1454 = LNGR
 5775   { 1455,	2,	1,	2,	90,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo181, -1 ,nullptr },  // Inst #1455 = LNR
 5776   { 1456,	2,	1,	4,	373,	0, 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #1456 = LNXBR
 5777   { 1457,	2,	1,	4,	426,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #1457 = LNXR
 5778   { 1458,	6,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x80084ULL, ImplicitList1, nullptr, OperandInfo256, -1 ,nullptr },  // Inst #1458 = LOC
 5779   { 1459,	5,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo257, -1 ,nullptr },  // Inst #1459 = LOCAsm
 5780   { 1460,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1460 = LOCAsmE
 5781   { 1461,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1461 = LOCAsmH
 5782   { 1462,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1462 = LOCAsmHE
 5783   { 1463,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1463 = LOCAsmL
 5784   { 1464,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1464 = LOCAsmLE
 5785   { 1465,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1465 = LOCAsmLH
 5786   { 1466,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1466 = LOCAsmM
 5787   { 1467,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1467 = LOCAsmNE
 5788   { 1468,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1468 = LOCAsmNH
 5789   { 1469,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1469 = LOCAsmNHE
 5790   { 1470,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1470 = LOCAsmNL
 5791   { 1471,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1471 = LOCAsmNLE
 5792   { 1472,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1472 = LOCAsmNLH
 5793   { 1473,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1473 = LOCAsmNM
 5794   { 1474,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1474 = LOCAsmNO
 5795   { 1475,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1475 = LOCAsmNP
 5796   { 1476,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1476 = LOCAsmNZ
 5797   { 1477,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1477 = LOCAsmO
 5798   { 1478,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1478 = LOCAsmP
 5799   { 1479,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo258, -1 ,nullptr },  // Inst #1479 = LOCAsmZ
 5800   { 1480,	6,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x80084ULL, ImplicitList1, nullptr, OperandInfo259, -1 ,nullptr },  // Inst #1480 = LOCFH
 5801   { 1481,	5,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo260, -1 ,nullptr },  // Inst #1481 = LOCFHAsm
 5802   { 1482,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1482 = LOCFHAsmE
 5803   { 1483,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1483 = LOCFHAsmH
 5804   { 1484,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1484 = LOCFHAsmHE
 5805   { 1485,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1485 = LOCFHAsmL
 5806   { 1486,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1486 = LOCFHAsmLE
 5807   { 1487,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1487 = LOCFHAsmLH
 5808   { 1488,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1488 = LOCFHAsmM
 5809   { 1489,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1489 = LOCFHAsmNE
 5810   { 1490,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1490 = LOCFHAsmNH
 5811   { 1491,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1491 = LOCFHAsmNHE
 5812   { 1492,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1492 = LOCFHAsmNL
 5813   { 1493,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1493 = LOCFHAsmNLE
 5814   { 1494,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1494 = LOCFHAsmNLH
 5815   { 1495,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1495 = LOCFHAsmNM
 5816   { 1496,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1496 = LOCFHAsmNO
 5817   { 1497,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1497 = LOCFHAsmNP
 5818   { 1498,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1498 = LOCFHAsmNZ
 5819   { 1499,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1499 = LOCFHAsmO
 5820   { 1500,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1500 = LOCFHAsmP
 5821   { 1501,	4,	1,	6,	53,	0|(1ULL<<MCID::MayLoad), 0x84ULL, ImplicitList1, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #1501 = LOCFHAsmZ
 5822   { 1502,	5,	1,	4,	51,	0|(1ULL<<MCID::Commutable), 0x80000ULL, ImplicitList1, nullptr, OperandInfo262, -1 ,nullptr },  // Inst #1502 = LOCFHR
 5823   { 1503,	4,	1,	4,	51,	0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList1, nullptr, OperandInfo263, -1 ,nullptr },  // Inst #1503 = LOCFHRAsm
 5824   { 1504,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1504 = LOCFHRAsmE
 5825   { 1505,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1505 = LOCFHRAsmH
 5826   { 1506,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1506 = LOCFHRAsmHE
 5827   { 1507,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1507 = LOCFHRAsmL
 5828   { 1508,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1508 = LOCFHRAsmLE
 5829   { 1509,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1509 = LOCFHRAsmLH
 5830   { 1510,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1510 = LOCFHRAsmM
 5831   { 1511,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1511 = LOCFHRAsmNE
 5832   { 1512,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1512 = LOCFHRAsmNH
 5833   { 1513,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1513 = LOCFHRAsmNHE
 5834   { 1514,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1514 = LOCFHRAsmNL
 5835   { 1515,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1515 = LOCFHRAsmNLE
 5836   { 1516,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1516 = LOCFHRAsmNLH
 5837   { 1517,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1517 = LOCFHRAsmNM
 5838   { 1518,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1518 = LOCFHRAsmNO
 5839   { 1519,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1519 = LOCFHRAsmNP
 5840   { 1520,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1520 = LOCFHRAsmNZ
 5841   { 1521,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1521 = LOCFHRAsmO
 5842   { 1522,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1522 = LOCFHRAsmP
 5843   { 1523,	3,	1,	4,	51,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo264, -1 ,nullptr },  // Inst #1523 = LOCFHRAsmZ
 5844   { 1524,	6,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x80104ULL, ImplicitList1, nullptr, OperandInfo265, -1 ,nullptr },  // Inst #1524 = LOCG
 5845   { 1525,	5,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo266, -1 ,nullptr },  // Inst #1525 = LOCGAsm
 5846   { 1526,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1526 = LOCGAsmE
 5847   { 1527,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1527 = LOCGAsmH
 5848   { 1528,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1528 = LOCGAsmHE
 5849   { 1529,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1529 = LOCGAsmL
 5850   { 1530,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1530 = LOCGAsmLE
 5851   { 1531,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1531 = LOCGAsmLH
 5852   { 1532,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1532 = LOCGAsmM
 5853   { 1533,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1533 = LOCGAsmNE
 5854   { 1534,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1534 = LOCGAsmNH
 5855   { 1535,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1535 = LOCGAsmNHE
 5856   { 1536,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1536 = LOCGAsmNL
 5857   { 1537,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1537 = LOCGAsmNLE
 5858   { 1538,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1538 = LOCGAsmNLH
 5859   { 1539,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1539 = LOCGAsmNM
 5860   { 1540,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1540 = LOCGAsmNO
 5861   { 1541,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1541 = LOCGAsmNP
 5862   { 1542,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1542 = LOCGAsmNZ
 5863   { 1543,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1543 = LOCGAsmO
 5864   { 1544,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1544 = LOCGAsmP
 5865   { 1545,	4,	1,	6,	858,	0|(1ULL<<MCID::MayLoad), 0x104ULL, ImplicitList1, nullptr, OperandInfo267, -1 ,nullptr },  // Inst #1545 = LOCGAsmZ
 5866   { 1546,	5,	1,	6,	52,	0, 0x80000ULL, ImplicitList1, nullptr, OperandInfo268, -1 ,nullptr },  // Inst #1546 = LOCGHI
 5867   { 1547,	4,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo269, -1 ,nullptr },  // Inst #1547 = LOCGHIAsm
 5868   { 1548,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1548 = LOCGHIAsmE
 5869   { 1549,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1549 = LOCGHIAsmH
 5870   { 1550,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1550 = LOCGHIAsmHE
 5871   { 1551,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1551 = LOCGHIAsmL
 5872   { 1552,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1552 = LOCGHIAsmLE
 5873   { 1553,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1553 = LOCGHIAsmLH
 5874   { 1554,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1554 = LOCGHIAsmM
 5875   { 1555,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1555 = LOCGHIAsmNE
 5876   { 1556,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1556 = LOCGHIAsmNH
 5877   { 1557,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1557 = LOCGHIAsmNHE
 5878   { 1558,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1558 = LOCGHIAsmNL
 5879   { 1559,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1559 = LOCGHIAsmNLE
 5880   { 1560,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1560 = LOCGHIAsmNLH
 5881   { 1561,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1561 = LOCGHIAsmNM
 5882   { 1562,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1562 = LOCGHIAsmNO
 5883   { 1563,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1563 = LOCGHIAsmNP
 5884   { 1564,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1564 = LOCGHIAsmNZ
 5885   { 1565,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1565 = LOCGHIAsmO
 5886   { 1566,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1566 = LOCGHIAsmP
 5887   { 1567,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #1567 = LOCGHIAsmZ
 5888   { 1568,	5,	1,	4,	857,	0|(1ULL<<MCID::Commutable), 0x80000ULL, ImplicitList1, nullptr, OperandInfo270, -1 ,nullptr },  // Inst #1568 = LOCGR
 5889   { 1569,	4,	1,	4,	857,	0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList1, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #1569 = LOCGRAsm
 5890   { 1570,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1570 = LOCGRAsmE
 5891   { 1571,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1571 = LOCGRAsmH
 5892   { 1572,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1572 = LOCGRAsmHE
 5893   { 1573,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1573 = LOCGRAsmL
 5894   { 1574,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1574 = LOCGRAsmLE
 5895   { 1575,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1575 = LOCGRAsmLH
 5896   { 1576,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1576 = LOCGRAsmM
 5897   { 1577,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1577 = LOCGRAsmNE
 5898   { 1578,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1578 = LOCGRAsmNH
 5899   { 1579,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1579 = LOCGRAsmNHE
 5900   { 1580,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1580 = LOCGRAsmNL
 5901   { 1581,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1581 = LOCGRAsmNLE
 5902   { 1582,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1582 = LOCGRAsmNLH
 5903   { 1583,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1583 = LOCGRAsmNM
 5904   { 1584,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1584 = LOCGRAsmNO
 5905   { 1585,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1585 = LOCGRAsmNP
 5906   { 1586,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1586 = LOCGRAsmNZ
 5907   { 1587,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1587 = LOCGRAsmO
 5908   { 1588,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1588 = LOCGRAsmP
 5909   { 1589,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #1589 = LOCGRAsmZ
 5910   { 1590,	5,	1,	6,	52,	0, 0x80000ULL, ImplicitList1, nullptr, OperandInfo271, -1 ,nullptr },  // Inst #1590 = LOCHHI
 5911   { 1591,	4,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo272, -1 ,nullptr },  // Inst #1591 = LOCHHIAsm
 5912   { 1592,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1592 = LOCHHIAsmE
 5913   { 1593,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1593 = LOCHHIAsmH
 5914   { 1594,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1594 = LOCHHIAsmHE
 5915   { 1595,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1595 = LOCHHIAsmL
 5916   { 1596,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1596 = LOCHHIAsmLE
 5917   { 1597,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1597 = LOCHHIAsmLH
 5918   { 1598,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1598 = LOCHHIAsmM
 5919   { 1599,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1599 = LOCHHIAsmNE
 5920   { 1600,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1600 = LOCHHIAsmNH
 5921   { 1601,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1601 = LOCHHIAsmNHE
 5922   { 1602,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1602 = LOCHHIAsmNL
 5923   { 1603,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1603 = LOCHHIAsmNLE
 5924   { 1604,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1604 = LOCHHIAsmNLH
 5925   { 1605,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1605 = LOCHHIAsmNM
 5926   { 1606,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1606 = LOCHHIAsmNO
 5927   { 1607,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1607 = LOCHHIAsmNP
 5928   { 1608,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1608 = LOCHHIAsmNZ
 5929   { 1609,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1609 = LOCHHIAsmO
 5930   { 1610,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1610 = LOCHHIAsmP
 5931   { 1611,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1611 = LOCHHIAsmZ
 5932   { 1612,	5,	1,	6,	52,	0, 0x80000ULL, ImplicitList1, nullptr, OperandInfo273, -1 ,nullptr },  // Inst #1612 = LOCHI
 5933   { 1613,	4,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo274, -1 ,nullptr },  // Inst #1613 = LOCHIAsm
 5934   { 1614,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1614 = LOCHIAsmE
 5935   { 1615,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1615 = LOCHIAsmH
 5936   { 1616,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1616 = LOCHIAsmHE
 5937   { 1617,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1617 = LOCHIAsmL
 5938   { 1618,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1618 = LOCHIAsmLE
 5939   { 1619,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1619 = LOCHIAsmLH
 5940   { 1620,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1620 = LOCHIAsmM
 5941   { 1621,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1621 = LOCHIAsmNE
 5942   { 1622,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1622 = LOCHIAsmNH
 5943   { 1623,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1623 = LOCHIAsmNHE
 5944   { 1624,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1624 = LOCHIAsmNL
 5945   { 1625,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1625 = LOCHIAsmNLE
 5946   { 1626,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1626 = LOCHIAsmNLH
 5947   { 1627,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1627 = LOCHIAsmNM
 5948   { 1628,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1628 = LOCHIAsmNO
 5949   { 1629,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1629 = LOCHIAsmNP
 5950   { 1630,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1630 = LOCHIAsmNZ
 5951   { 1631,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1631 = LOCHIAsmO
 5952   { 1632,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1632 = LOCHIAsmP
 5953   { 1633,	3,	1,	6,	52,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #1633 = LOCHIAsmZ
 5954   { 1634,	5,	1,	4,	857,	0|(1ULL<<MCID::Commutable), 0x80000ULL, ImplicitList1, nullptr, OperandInfo275, -1 ,nullptr },  // Inst #1634 = LOCR
 5955   { 1635,	4,	1,	4,	857,	0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList1, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #1635 = LOCRAsm
 5956   { 1636,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1636 = LOCRAsmE
 5957   { 1637,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1637 = LOCRAsmH
 5958   { 1638,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1638 = LOCRAsmHE
 5959   { 1639,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1639 = LOCRAsmL
 5960   { 1640,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1640 = LOCRAsmLE
 5961   { 1641,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1641 = LOCRAsmLH
 5962   { 1642,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1642 = LOCRAsmM
 5963   { 1643,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1643 = LOCRAsmNE
 5964   { 1644,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1644 = LOCRAsmNH
 5965   { 1645,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1645 = LOCRAsmNHE
 5966   { 1646,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1646 = LOCRAsmNL
 5967   { 1647,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1647 = LOCRAsmNLE
 5968   { 1648,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1648 = LOCRAsmNLH
 5969   { 1649,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1649 = LOCRAsmNM
 5970   { 1650,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1650 = LOCRAsmNO
 5971   { 1651,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1651 = LOCRAsmNP
 5972   { 1652,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1652 = LOCRAsmNZ
 5973   { 1653,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1653 = LOCRAsmO
 5974   { 1654,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1654 = LOCRAsmP
 5975   { 1655,	3,	1,	4,	857,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #1655 = LOCRAsmZ
 5976   { 1656,	2,	0,	4,	828,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #1656 = LPCTL
 5977   { 1657,	5,	1,	6,	281,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo276, -1 ,nullptr },  // Inst #1657 = LPD
 5978   { 1658,	2,	1,	4,	371,	0, 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #1658 = LPDBR
 5981   { 1661,	5,	1,	6,	281,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo276, -1 ,nullptr },  // Inst #1661 = LPDG
 5982   { 1662,	2,	1,	2,	425,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #1662 = LPDR
 5983   { 1663,	2,	1,	4,	371,	0, 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo75, -1 ,nullptr },  // Inst #1663 = LPEBR
 5984   { 1664,	2,	1,	2,	425,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo75, -1 ,nullptr },  // Inst #1664 = LPER
 5985   { 1665,	2,	1,	4,	89,	0, 0x3b800ULL, nullptr, ImplicitList1, OperandInfo159, -1 ,nullptr },  // Inst #1665 = LPGFR
 5986   { 1666,	2,	1,	4,	88,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #1666 = LPGR
 5989   { 1669,	2,	1,	2,	88,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo181, -1 ,nullptr },  // Inst #1669 = LPR
 5990   { 1670,	2,	0,	4,	754,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #1670 = LPSW
 5991   { 1671,	2,	0,	4,	754,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x200ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #1671 = LPSWE
 5992   { 1672,	5,	2,	4,	781,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo277, -1 ,nullptr },  // Inst #1672 = LPTEA
 5993   { 1673,	2,	1,	4,	373,	0, 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #1673 = LPXBR
 5994   { 1674,	2,	1,	4,	426,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #1674 = LPXR
 5996   { 1676,	4,	1,	4,	782,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #1676 = LRA
 5997   { 1677,	4,	1,	6,	782,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #1677 = LRAG
 5998   { 1678,	4,	1,	6,	782,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #1678 = LRAY
 6007   { 1687,	2,	0,	4,	828,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #1687 = LSCTL
 6008   { 1688,	4,	1,	6,	44,	0|(1ULL<<MCID::MayLoad), 0x3b88cULL, nullptr, ImplicitList1, OperandInfo134, -1 ,nullptr },  // Inst #1688 = LT
 6009   { 1689,	2,	1,	4,	346,	0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL, ImplicitList3, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #1689 = LTDBR
 6010   { 1690,	2,	0,	4,	347,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL, ImplicitList3, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #1690 = LTDBRCompare
 6011   { 1691,	2,	1,	2,	410,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #1691 = LTDR
 6012   { 1692,	2,	1,	4,	460,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #1692 = LTDTR
 6013   { 1693,	2,	1,	4,	346,	0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL, ImplicitList3, ImplicitList1, OperandInfo75, -1 ,nullptr },  // Inst #1693 = LTEBR
 6014   { 1694,	2,	0,	4,	347,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL, ImplicitList3, ImplicitList1, OperandInfo75, -1 ,nullptr },  // Inst #1694 = LTEBRCompare
 6015   { 1695,	2,	1,	2,	410,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo75, -1 ,nullptr },  // Inst #1695 = LTER
 6016   { 1696,	4,	1,	6,	44,	0|(1ULL<<MCID::MayLoad), 0x3b90cULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #1696 = LTG
 6017   { 1697,	4,	1,	6,	59,	0|(1ULL<<MCID::MayLoad), 0x3b88cULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #1697 = LTGF
 6018   { 1698,	2,	1,	4,	60,	0, 0x3b800ULL, nullptr, ImplicitList1, OperandInfo159, -1 ,nullptr },  // Inst #1698 = LTGFR
 6019   { 1699,	2,	1,	4,	45,	0, 0x3b800ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #1699 = LTGR
 6020   { 1700,	2,	1,	2,	45,	0, 0x3b800ULL, nullptr, ImplicitList1, OperandInfo181, -1 ,nullptr },  // Inst #1700 = LTR
 6021   { 1701,	2,	1,	4,	348,	0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL, ImplicitList3, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #1701 = LTXBR
 6022   { 1702,	2,	0,	4,	348,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL, ImplicitList3, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #1702 = LTXBRCompare
 6023   { 1703,	2,	1,	4,	411,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #1703 = LTXR
 6024   { 1704,	2,	1,	4,	461,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo76, -1 ,nullptr },  // Inst #1704 = LTXTR
 6090   { 1770,	5,	1,	6,	196,	0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #1770 = MSC
 6091   { 1771,	2,	0,	4,	832,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList10, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #1771 = MSCH
 6102   { 1782,	5,	1,	6,	197,	0|(1ULL<<MCID::MayLoad), 0x10cULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #1782 = MSGC
 6107   { 1787,	3,	1,	4,	199,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo112, -1 ,nullptr },  // Inst #1787 = MSGRKC
 6109   { 1789,	3,	1,	4,	198,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo117, -1 ,nullptr },  // Inst #1789 = MSRKC
 6115   { 1795,	6,	0,	6,	787,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo292, -1 ,nullptr },  // Inst #1795 = MVCK
 6116   { 1796,	4,	2,	2,	27,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #1796 = MVCL
 6117   { 1797,	6,	2,	4,	27,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo178, -1 ,nullptr },  // Inst #1797 = MVCLE
 6118   { 1798,	6,	2,	6,	27,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo178, -1 ,nullptr },  // Inst #1798 = MVCLU
 6120   { 1800,	6,	0,	6,	787,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo292, -1 ,nullptr },  // Inst #1800 = MVCP
 6122   { 1802,	6,	0,	6,	787,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo292, -1 ,nullptr },  // Inst #1802 = MVCS
 6131   { 1811,	2,	0,	4,	790,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList7, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #1811 = MVPG
 6132   { 1812,	4,	2,	4,	49,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList7, ImplicitList1, OperandInfo185, -1 ,nullptr },  // Inst #1812 = MVST
 6148   { 1828,	5,	1,	4,	144,	0|(1ULL<<MCID::MayLoad), 0x23088ULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #1828 = N
 6149   { 1829,	5,	0,	6,	155,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo176, -1 ,nullptr },  // Inst #1829 = NC
 6150   { 1830,	3,	1,	4,	176,	0, 0x23000ULL, nullptr, ImplicitList1, OperandInfo112, -1 ,nullptr },  // Inst #1830 = NCGRK
 6151   { 1831,	3,	1,	4,	176,	0, 0x23000ULL, nullptr, ImplicitList1, OperandInfo117, -1 ,nullptr },  // Inst #1831 = NCRK
 6152   { 1832,	5,	1,	6,	144,	0|(1ULL<<MCID::MayLoad), 0x2310cULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #1832 = NG
 6153   { 1833,	3,	1,	4,	145,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo111, -1 ,nullptr },  // Inst #1833 = NGR
 6154   { 1834,	3,	1,	4,	145,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo112, -1 ,nullptr },  // Inst #1834 = NGRK
 6155   { 1835,	3,	0,	4,	147,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #1835 = NI
 6157   { 1837,	3,	1,	6,	148,	0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL, nullptr, ImplicitList1, OperandInfo115, -1 ,nullptr },  // Inst #1837 = NIHF
 6158   { 1838,	3,	1,	4,	149,	0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo115, -1 ,nullptr },  // Inst #1838 = NIHH
 6159   { 1839,	3,	1,	4,	150,	0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo115, -1 ,nullptr },  // Inst #1839 = NIHL
 6160   { 1840,	3,	1,	6,	151,	0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL, nullptr, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #1840 = NILF
 6161   { 1841,	3,	1,	4,	152,	0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #1841 = NILH
 6162   { 1842,	3,	1,	4,	153,	0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #1842 = NILL
 6163   { 1843,	3,	0,	6,	147,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #1843 = NIY
 6164   { 1844,	3,	1,	4,	178,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo112, -1 ,nullptr },  // Inst #1844 = NNGRK
 6165   { 1845,	3,	1,	4,	178,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo117, -1 ,nullptr },  // Inst #1845 = NNRK
 6166   { 1846,	3,	1,	4,	179,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo112, -1 ,nullptr },  // Inst #1846 = NOGRK
 6167   { 1847,	3,	1,	4,	179,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo117, -1 ,nullptr },  // Inst #1847 = NORK
 6168   { 1848,	3,	1,	2,	154,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #1848 = NR
 6169   { 1849,	3,	1,	4,	154,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo117, -1 ,nullptr },  // Inst #1849 = NRK
 6171   { 1851,	3,	1,	4,	180,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo112, -1 ,nullptr },  // Inst #1851 = NXGRK
 6172   { 1852,	3,	1,	4,	180,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo117, -1 ,nullptr },  // Inst #1852 = NXRK
 6173   { 1853,	5,	1,	6,	144,	0|(1ULL<<MCID::MayLoad), 0x2308cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #1853 = NY
 6174   { 1854,	5,	1,	4,	156,	0|(1ULL<<MCID::MayLoad), 0x23088ULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #1854 = O
 6175   { 1855,	5,	0,	6,	167,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo176, -1 ,nullptr },  // Inst #1855 = OC
 6176   { 1856,	3,	1,	4,	177,	0, 0x23000ULL, nullptr, ImplicitList1, OperandInfo112, -1 ,nullptr },  // Inst #1856 = OCGRK
 6177   { 1857,	3,	1,	4,	177,	0, 0x23000ULL, nullptr, ImplicitList1, OperandInfo117, -1 ,nullptr },  // Inst #1857 = OCRK
 6178   { 1858,	5,	1,	6,	156,	0|(1ULL<<MCID::MayLoad), 0x2310cULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #1858 = OG
 6179   { 1859,	3,	1,	4,	157,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo111, -1 ,nullptr },  // Inst #1859 = OGR
 6180   { 1860,	3,	1,	4,	157,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo112, -1 ,nullptr },  // Inst #1860 = OGRK
 6181   { 1861,	3,	0,	4,	158,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #1861 = OI
 6182   { 1862,	3,	1,	6,	160,	0, 0x23000ULL, nullptr, ImplicitList1, OperandInfo115, -1 ,nullptr },  // Inst #1862 = OIHF
 6183   { 1863,	3,	1,	4,	161,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo115, -1 ,nullptr },  // Inst #1863 = OIHH
 6184   { 1864,	3,	1,	4,	162,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo115, -1 ,nullptr },  // Inst #1864 = OIHL
 6185   { 1865,	3,	1,	6,	163,	0, 0x23000ULL, nullptr, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #1865 = OILF
 6186   { 1866,	3,	1,	4,	164,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #1866 = OILH
 6187   { 1867,	3,	1,	4,	165,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #1867 = OILL
 6188   { 1868,	3,	0,	6,	158,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #1868 = OIY
 6189   { 1869,	3,	1,	2,	166,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #1869 = OR
 6190   { 1870,	3,	1,	4,	166,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo117, -1 ,nullptr },  // Inst #1870 = ORK
 6191   { 1871,	5,	1,	6,	156,	0|(1ULL<<MCID::MayLoad), 0x2308cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #1871 = OY
 6195   { 1875,	0,	0,	4,	862,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, nullptr, -1 ,nullptr },  // Inst #1875 = PCC
 6201   { 1881,	2,	0,	4,	774,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #1881 = PGIN
 6202   { 1882,	2,	0,	4,	775,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #1882 = PGOUT
 6205   { 1885,	6,	0,	6,	278,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo299, -1 ,nullptr },  // Inst #1885 = PLO
 6206   { 1886,	2,	1,	4,	839,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #1886 = POPCNT
 6207   { 1887,	3,	1,	4,	329,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo51, -1 ,nullptr },  // Inst #1887 = POPCNTOpt
 6209   { 1889,	4,	2,	4,	846,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #1889 = PPNO
 6210   { 1890,	0,	0,	2,	794,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, nullptr, -1 ,nullptr },  // Inst #1890 = PR
 6211   { 1891,	4,	2,	4,	292,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #1891 = PRNO
 6214   { 1894,	0,	0,	2,	802,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList8, ImplicitList1, nullptr, -1 ,nullptr },  // Inst #1894 = PTFF
 6221   { 1901,	0,	0,	4,	833,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList10, ImplicitList1, nullptr, -1 ,nullptr },  // Inst #1901 = RCHP
 6222   { 1902,	6,	1,	6,	871,	0, 0x3b800ULL, nullptr, ImplicitList1, OperandInfo302, -1 ,nullptr },  // Inst #1902 = RISBG
 6223   { 1903,	6,	1,	6,	871,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo82, -1 ,nullptr },  // Inst #1903 = RISBG32
 6229   { 1909,	6,	1,	6,	217,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo302, -1 ,nullptr },  // Inst #1909 = RNSBG
 6230   { 1910,	6,	1,	6,	217,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo302, -1 ,nullptr },  // Inst #1910 = ROSBG
 6231   { 1911,	2,	0,	4,	796,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #1911 = RP
 6232   { 1912,	2,	0,	4,	770,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo213, -1 ,nullptr },  // Inst #1912 = RRBE
 6236   { 1916,	0,	0,	4,	831,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList10, ImplicitList1, nullptr, -1 ,nullptr },  // Inst #1916 = RSCH
 6237   { 1917,	6,	1,	6,	217,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo302, -1 ,nullptr },  // Inst #1917 = RXSBG
 6238   { 1918,	5,	1,	4,	129,	0|(1ULL<<MCID::MayLoad), 0x23c88ULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #1918 = S
 6246   { 1926,	2,	0,	4,	830,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #1926 = SCCTR
 6248   { 1928,	2,	0,	4,	869,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #1928 = SCK
 6251   { 1931,	5,	1,	4,	436,	0|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, ImplicitList1, OperandInfo102, -1 ,nullptr },  // Inst #1931 = SD
 6252   { 1932,	5,	1,	6,	382,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fd08ULL, ImplicitList3, ImplicitList1, OperandInfo102, -1 ,nullptr },  // Inst #1932 = SDB
 6253   { 1933,	3,	1,	4,	383,	0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL, ImplicitList3, ImplicitList1, OperandInfo103, -1 ,nullptr },  // Inst #1933 = SDBR
 6254   { 1934,	3,	1,	2,	437,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo103, -1 ,nullptr },  // Inst #1934 = SDR
 6255   { 1935,	3,	1,	4,	499,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo104, -1 ,nullptr },  // Inst #1935 = SDTR
 6256   { 1936,	4,	1,	4,	499,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo105, -1 ,nullptr },  // Inst #1936 = SDTRA
 6257   { 1937,	5,	1,	4,	436,	0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo106, -1 ,nullptr },  // Inst #1937 = SE
 6258   { 1938,	5,	1,	6,	382,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fc88ULL, ImplicitList3, ImplicitList1, OperandInfo106, -1 ,nullptr },  // Inst #1938 = SEB
 6259   { 1939,	3,	1,	4,	383,	0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL, ImplicitList3, ImplicitList1, OperandInfo107, -1 ,nullptr },  // Inst #1939 = SEBR
 6260   { 1940,	5,	1,	4,	56,	0|(1ULL<<MCID::Commutable), 0x80000ULL, ImplicitList1, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #1940 = SELFHR
 6261   { 1941,	4,	1,	4,	56,	0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList1, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #1941 = SELFHRAsm
 6262   { 1942,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1942 = SELFHRAsmE
 6263   { 1943,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1943 = SELFHRAsmH
 6264   { 1944,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1944 = SELFHRAsmHE
 6265   { 1945,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1945 = SELFHRAsmL
 6266   { 1946,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1946 = SELFHRAsmLE
 6267   { 1947,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1947 = SELFHRAsmLH
 6268   { 1948,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1948 = SELFHRAsmM
 6269   { 1949,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1949 = SELFHRAsmNE
 6270   { 1950,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1950 = SELFHRAsmNH
 6271   { 1951,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1951 = SELFHRAsmNHE
 6272   { 1952,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1952 = SELFHRAsmNL
 6273   { 1953,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1953 = SELFHRAsmNLE
 6274   { 1954,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1954 = SELFHRAsmNLH
 6275   { 1955,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1955 = SELFHRAsmNM
 6276   { 1956,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1956 = SELFHRAsmNO
 6277   { 1957,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1957 = SELFHRAsmNP
 6278   { 1958,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1958 = SELFHRAsmNZ
 6279   { 1959,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1959 = SELFHRAsmO
 6280   { 1960,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1960 = SELFHRAsmP
 6281   { 1961,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1961 = SELFHRAsmZ
 6282   { 1962,	5,	1,	4,	56,	0|(1ULL<<MCID::Commutable), 0x80000ULL, ImplicitList1, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #1962 = SELGR
 6283   { 1963,	4,	1,	4,	56,	0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList1, nullptr, OperandInfo225, -1 ,nullptr },  // Inst #1963 = SELGRAsm
 6284   { 1964,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1964 = SELGRAsmE
 6285   { 1965,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1965 = SELGRAsmH
 6286   { 1966,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1966 = SELGRAsmHE
 6287   { 1967,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1967 = SELGRAsmL
 6288   { 1968,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1968 = SELGRAsmLE
 6289   { 1969,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1969 = SELGRAsmLH
 6290   { 1970,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1970 = SELGRAsmM
 6291   { 1971,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1971 = SELGRAsmNE
 6292   { 1972,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1972 = SELGRAsmNH
 6293   { 1973,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1973 = SELGRAsmNHE
 6294   { 1974,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1974 = SELGRAsmNL
 6295   { 1975,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1975 = SELGRAsmNLE
 6296   { 1976,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1976 = SELGRAsmNLH
 6297   { 1977,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1977 = SELGRAsmNM
 6298   { 1978,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1978 = SELGRAsmNO
 6299   { 1979,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1979 = SELGRAsmNP
 6300   { 1980,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1980 = SELGRAsmNZ
 6301   { 1981,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1981 = SELGRAsmO
 6302   { 1982,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1982 = SELGRAsmP
 6303   { 1983,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #1983 = SELGRAsmZ
 6304   { 1984,	5,	1,	4,	56,	0|(1ULL<<MCID::Commutable), 0x80000ULL, ImplicitList1, nullptr, OperandInfo86, -1 ,nullptr },  // Inst #1984 = SELR
 6305   { 1985,	4,	1,	4,	56,	0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList1, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #1985 = SELRAsm
 6306   { 1986,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #1986 = SELRAsmE
 6307   { 1987,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #1987 = SELRAsmH
 6308   { 1988,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #1988 = SELRAsmHE
 6309   { 1989,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #1989 = SELRAsmL
 6310   { 1990,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #1990 = SELRAsmLE
 6311   { 1991,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #1991 = SELRAsmLH
 6312   { 1992,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #1992 = SELRAsmM
 6313   { 1993,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #1993 = SELRAsmNE
 6314   { 1994,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #1994 = SELRAsmNH
 6315   { 1995,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #1995 = SELRAsmNHE
 6316   { 1996,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #1996 = SELRAsmNL
 6317   { 1997,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #1997 = SELRAsmNLE
 6318   { 1998,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #1998 = SELRAsmNLH
 6319   { 1999,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #1999 = SELRAsmNM
 6320   { 2000,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #2000 = SELRAsmNO
 6321   { 2001,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #2001 = SELRAsmNP
 6322   { 2002,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #2002 = SELRAsmNZ
 6323   { 2003,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #2003 = SELRAsmO
 6324   { 2004,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #2004 = SELRAsmP
 6325   { 2005,	3,	1,	4,	56,	0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #2005 = SELRAsmZ
 6326   { 2006,	3,	1,	2,	437,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo107, -1 ,nullptr },  // Inst #2006 = SER
 6329   { 2009,	5,	1,	6,	129,	0|(1ULL<<MCID::MayLoad), 0x23d0cULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #2009 = SG
 6330   { 2010,	5,	1,	6,	844,	0|(1ULL<<MCID::MayLoad), 0x23c8cULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #2010 = SGF
 6331   { 2011,	3,	1,	4,	143,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo110, -1 ,nullptr },  // Inst #2011 = SGFR
 6332   { 2012,	5,	1,	6,	142,	0|(1ULL<<MCID::MayLoad), 0x23c4cULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #2012 = SGH
 6333   { 2013,	3,	1,	4,	131,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo111, -1 ,nullptr },  // Inst #2013 = SGR
 6334   { 2014,	3,	1,	4,	131,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo112, -1 ,nullptr },  // Inst #2014 = SGRK
 6335   { 2015,	5,	1,	4,	130,	0|(1ULL<<MCID::MayLoad), 0x23c48ULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #2015 = SH
 6336   { 2016,	3,	1,	4,	138,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo113, -1 ,nullptr },  // Inst #2016 = SHHHR
 6337   { 2017,	3,	1,	4,	139,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo114, -1 ,nullptr },  // Inst #2017 = SHHLR
 6338   { 2018,	5,	1,	6,	130,	0|(1ULL<<MCID::MayLoad), 0x23c4cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #2018 = SHY
 6339   { 2019,	2,	0,	4,	823,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #2019 = SIE
 6340   { 2020,	2,	0,	4,	822,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList17, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #2020 = SIGA
 6341   { 2021,	4,	0,	4,	822,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo164, -1 ,nullptr },  // Inst #2021 = SIGP
 6342   { 2022,	5,	1,	4,	133,	0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #2022 = SL
 6343   { 2023,	4,	1,	4,	210,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo310, -1 ,nullptr },  // Inst #2023 = SLA
 6344   { 2024,	4,	1,	6,	210,	0, 0x4ULL, nullptr, ImplicitList1, OperandInfo212, -1 ,nullptr },  // Inst #2024 = SLAG
 6345   { 2025,	4,	1,	6,	210,	0, 0x4ULL, nullptr, ImplicitList1, OperandInfo305, -1 ,nullptr },  // Inst #2025 = SLAK
 6346   { 2026,	5,	1,	6,	140,	0|(1ULL<<MCID::MayLoad), 0x8cULL, ImplicitList1, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #2026 = SLB
 6346   { 2026,	5,	1,	6,	140,	0|(1ULL<<MCID::MayLoad), 0x8cULL, ImplicitList1, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #2026 = SLB
 6347   { 2027,	5,	1,	6,	140,	0|(1ULL<<MCID::MayLoad), 0x10cULL, ImplicitList1, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #2027 = SLBG
 6347   { 2027,	5,	1,	6,	140,	0|(1ULL<<MCID::MayLoad), 0x10cULL, ImplicitList1, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #2027 = SLBG
 6348   { 2028,	3,	1,	4,	141,	0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo111, -1 ,nullptr },  // Inst #2028 = SLBGR
 6348   { 2028,	3,	1,	4,	141,	0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo111, -1 ,nullptr },  // Inst #2028 = SLBGR
 6349   { 2029,	3,	1,	4,	141,	0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #2029 = SLBR
 6349   { 2029,	3,	1,	4,	141,	0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #2029 = SLBR
 6350   { 2030,	4,	1,	4,	211,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo311, -1 ,nullptr },  // Inst #2030 = SLDA
 6353   { 2033,	3,	1,	6,	132,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #2033 = SLFI
 6354   { 2034,	5,	1,	6,	133,	0|(1ULL<<MCID::MayLoad), 0x10cULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #2034 = SLG
 6355   { 2035,	5,	1,	6,	133,	0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #2035 = SLGF
 6356   { 2036,	3,	1,	6,	134,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr },  // Inst #2036 = SLGFI
 6357   { 2037,	3,	1,	4,	134,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo110, -1 ,nullptr },  // Inst #2037 = SLGFR
 6358   { 2038,	3,	1,	4,	135,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo111, -1 ,nullptr },  // Inst #2038 = SLGR
 6359   { 2039,	3,	1,	4,	135,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo112, -1 ,nullptr },  // Inst #2039 = SLGRK
 6360   { 2040,	3,	1,	4,	138,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo113, -1 ,nullptr },  // Inst #2040 = SLHHHR
 6361   { 2041,	3,	1,	4,	139,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo114, -1 ,nullptr },  // Inst #2041 = SLHHLR
 6365   { 2045,	3,	1,	2,	136,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #2045 = SLR
 6366   { 2046,	3,	1,	4,	136,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo117, -1 ,nullptr },  // Inst #2046 = SLRK
 6368   { 2048,	5,	1,	6,	133,	0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #2048 = SLY
 6369   { 2049,	4,	2,	4,	336,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo177, -1 ,nullptr },  // Inst #2049 = SORTL
 6370   { 2050,	6,	0,	6,	304,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo118, -1 ,nullptr },  // Inst #2050 = SP
 6371   { 2051,	2,	0,	4,	830,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #2051 = SPCTR
 6373   { 2053,	1,	0,	2,	316,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo214, -1 ,nullptr },  // Inst #2053 = SPM
 6386   { 2066,	3,	1,	2,	137,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #2066 = SR
 6387   { 2067,	4,	1,	4,	209,	0, 0x3b800ULL, nullptr, ImplicitList1, OperandInfo310, -1 ,nullptr },  // Inst #2067 = SRA
 6388   { 2068,	4,	1,	6,	209,	0, 0x3b804ULL, nullptr, ImplicitList1, OperandInfo212, -1 ,nullptr },  // Inst #2068 = SRAG
 6389   { 2069,	4,	1,	6,	209,	0, 0x3b804ULL, nullptr, ImplicitList1, OperandInfo305, -1 ,nullptr },  // Inst #2069 = SRAK
 6390   { 2070,	4,	1,	4,	211,	0, 0x3b800ULL, nullptr, ImplicitList1, OperandInfo311, -1 ,nullptr },  // Inst #2070 = SRDA
 6393   { 2073,	3,	1,	4,	137,	0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo117, -1 ,nullptr },  // Inst #2073 = SRK
 6400   { 2080,	6,	0,	6,	307,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo314, -1 ,nullptr },  // Inst #2080 = SRP
 6401   { 2081,	4,	2,	4,	330,	0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList7, ImplicitList1, OperandInfo185, -1 ,nullptr },  // Inst #2081 = SRST
 6402   { 2082,	4,	2,	4,	330,	0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList7, ImplicitList1, OperandInfo185, -1 ,nullptr },  // Inst #2082 = SRSTU
 6406   { 2086,	2,	0,	4,	832,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList10, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #2086 = SSCH
 6407   { 2087,	3,	0,	4,	769,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo315, -1 ,nullptr },  // Inst #2087 = SSKE
 6408   { 2088,	2,	0,	4,	769,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo213, -1 ,nullptr },  // Inst #2088 = SSKEOpt
 6416   { 2096,	2,	0,	4,	805,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #2096 = STCK
 6418   { 2098,	2,	0,	4,	806,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x200ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #2098 = STCKE
 6419   { 2099,	2,	0,	4,	805,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #2099 = STCKF
 6424   { 2104,	2,	0,	4,	835,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #2104 = STCRW
 6449   { 2129,	5,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x80084ULL, ImplicitList1, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #2129 = STOC
 6450   { 2130,	4,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #2130 = STOCAsm
 6451   { 2131,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2131 = STOCAsmE
 6452   { 2132,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2132 = STOCAsmH
 6453   { 2133,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2133 = STOCAsmHE
 6454   { 2134,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2134 = STOCAsmL
 6455   { 2135,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2135 = STOCAsmLE
 6456   { 2136,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2136 = STOCAsmLH
 6457   { 2137,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2137 = STOCAsmM
 6458   { 2138,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2138 = STOCAsmNE
 6459   { 2139,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2139 = STOCAsmNH
 6460   { 2140,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2140 = STOCAsmNHE
 6461   { 2141,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2141 = STOCAsmNL
 6462   { 2142,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2142 = STOCAsmNLE
 6463   { 2143,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2143 = STOCAsmNLH
 6464   { 2144,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2144 = STOCAsmNM
 6465   { 2145,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2145 = STOCAsmNO
 6466   { 2146,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2146 = STOCAsmNP
 6467   { 2147,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2147 = STOCAsmNZ
 6468   { 2148,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2148 = STOCAsmO
 6469   { 2149,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2149 = STOCAsmP
 6470   { 2150,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #2150 = STOCAsmZ
 6471   { 2151,	5,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x80084ULL, ImplicitList1, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #2151 = STOCFH
 6472   { 2152,	4,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #2152 = STOCFHAsm
 6473   { 2153,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2153 = STOCFHAsmE
 6474   { 2154,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2154 = STOCFHAsmH
 6475   { 2155,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2155 = STOCFHAsmHE
 6476   { 2156,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2156 = STOCFHAsmL
 6477   { 2157,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2157 = STOCFHAsmLE
 6478   { 2158,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2158 = STOCFHAsmLH
 6479   { 2159,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2159 = STOCFHAsmM
 6480   { 2160,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2160 = STOCFHAsmNE
 6481   { 2161,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2161 = STOCFHAsmNH
 6482   { 2162,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2162 = STOCFHAsmNHE
 6483   { 2163,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2163 = STOCFHAsmNL
 6484   { 2164,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2164 = STOCFHAsmNLE
 6485   { 2165,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2165 = STOCFHAsmNLH
 6486   { 2166,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2166 = STOCFHAsmNM
 6487   { 2167,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2167 = STOCFHAsmNO
 6488   { 2168,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2168 = STOCFHAsmNP
 6489   { 2169,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2169 = STOCFHAsmNZ
 6490   { 2170,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2170 = STOCFHAsmO
 6491   { 2171,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2171 = STOCFHAsmP
 6492   { 2172,	3,	0,	6,	54,	0|(1ULL<<MCID::MayStore), 0x84ULL, ImplicitList1, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #2172 = STOCFHAsmZ
 6493   { 2173,	5,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x80104ULL, ImplicitList1, nullptr, OperandInfo320, -1 ,nullptr },  // Inst #2173 = STOCG
 6494   { 2174,	4,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo46, -1 ,nullptr },  // Inst #2174 = STOCGAsm
 6495   { 2175,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2175 = STOCGAsmE
 6496   { 2176,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2176 = STOCGAsmH
 6497   { 2177,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2177 = STOCGAsmHE
 6498   { 2178,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2178 = STOCGAsmL
 6499   { 2179,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2179 = STOCGAsmLE
 6500   { 2180,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2180 = STOCGAsmLH
 6501   { 2181,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2181 = STOCGAsmM
 6502   { 2182,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2182 = STOCGAsmNE
 6503   { 2183,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2183 = STOCGAsmNH
 6504   { 2184,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2184 = STOCGAsmNHE
 6505   { 2185,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2185 = STOCGAsmNL
 6506   { 2186,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2186 = STOCGAsmNLE
 6507   { 2187,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2187 = STOCGAsmNLH
 6508   { 2188,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2188 = STOCGAsmNM
 6509   { 2189,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2189 = STOCGAsmNO
 6510   { 2190,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2190 = STOCGAsmNP
 6511   { 2191,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2191 = STOCGAsmNZ
 6512   { 2192,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2192 = STOCGAsmO
 6513   { 2193,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2193 = STOCGAsmP
 6514   { 2194,	3,	0,	6,	859,	0|(1ULL<<MCID::MayStore), 0x104ULL, ImplicitList1, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #2194 = STOCGAsmZ
 6524   { 2204,	2,	0,	4,	832,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList10, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #2204 = STSCH
 6529   { 2209,	5,	1,	4,	436,	0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo106, -1 ,nullptr },  // Inst #2209 = SU
 6530   { 2210,	3,	1,	2,	437,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo107, -1 ,nullptr },  // Inst #2210 = SUR
 6531   { 2211,	1,	0,	2,	817,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo2, -1 ,nullptr },  // Inst #2211 = SVC
 6532   { 2212,	5,	1,	4,	436,	0|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, ImplicitList1, OperandInfo102, -1 ,nullptr },  // Inst #2212 = SW
 6533   { 2213,	3,	1,	2,	437,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo103, -1 ,nullptr },  // Inst #2213 = SWR
 6534   { 2214,	3,	1,	4,	384,	0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL, ImplicitList3, ImplicitList1, OperandInfo119, -1 ,nullptr },  // Inst #2214 = SXBR
 6535   { 2215,	3,	1,	2,	438,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo119, -1 ,nullptr },  // Inst #2215 = SXR
 6536   { 2216,	3,	1,	4,	500,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo120, -1 ,nullptr },  // Inst #2216 = SXTR
 6537   { 2217,	4,	1,	4,	500,	0, 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo121, -1 ,nullptr },  // Inst #2217 = SXTRA
 6538   { 2218,	5,	1,	6,	129,	0|(1ULL<<MCID::MayLoad), 0x23c8cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #2218 = SY
 6540   { 2220,	0,	0,	2,	318,	0, 0x0ULL, nullptr, ImplicitList1, nullptr, -1 ,nullptr },  // Inst #2220 = TAM
 6541   { 2221,	2,	0,	4,	798,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo306, -1 ,nullptr },  // Inst #2221 = TAR
 6543   { 2223,	3,	1,	4,	424,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo217, -1 ,nullptr },  // Inst #2223 = TBDR
 6544   { 2224,	3,	1,	4,	424,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo321, -1 ,nullptr },  // Inst #2224 = TBEDR
 6545   { 2225,	3,	0,	6,	322,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #2225 = TBEGIN
 6546   { 2226,	3,	0,	6,	322,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #2226 = TBEGINC
 6547   { 2227,	4,	0,	6,	401,	0, 0x3008ULL, nullptr, ImplicitList1, OperandInfo135, -1 ,nullptr },  // Inst #2227 = TCDB
 6548   { 2228,	4,	0,	6,	401,	0, 0x3008ULL, nullptr, ImplicitList1, OperandInfo142, -1 ,nullptr },  // Inst #2228 = TCEB
 6549   { 2229,	4,	0,	6,	402,	0, 0x3008ULL, nullptr, ImplicitList1, OperandInfo77, -1 ,nullptr },  // Inst #2229 = TCXB
 6550   { 2230,	4,	0,	6,	868,	0, 0x8ULL, nullptr, ImplicitList1, OperandInfo135, -1 ,nullptr },  // Inst #2230 = TDCDT
 6551   { 2231,	4,	0,	6,	517,	0, 0x8ULL, nullptr, ImplicitList1, OperandInfo142, -1 ,nullptr },  // Inst #2231 = TDCET
 6552   { 2232,	4,	0,	6,	518,	0, 0x8ULL, nullptr, ImplicitList1, OperandInfo77, -1 ,nullptr },  // Inst #2232 = TDCXT
 6553   { 2233,	4,	0,	6,	868,	0, 0x8ULL, nullptr, ImplicitList1, OperandInfo135, -1 ,nullptr },  // Inst #2233 = TDGDT
 6554   { 2234,	4,	0,	6,	517,	0, 0x8ULL, nullptr, ImplicitList1, OperandInfo142, -1 ,nullptr },  // Inst #2234 = TDGET
 6555   { 2235,	4,	0,	6,	518,	0, 0x8ULL, nullptr, ImplicitList1, OperandInfo77, -1 ,nullptr },  // Inst #2235 = TDGXT
 6556   { 2236,	0,	0,	4,	323,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, nullptr, -1 ,nullptr },  // Inst #2236 = TEND
 6557   { 2237,	2,	1,	4,	423,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo248, -1 ,nullptr },  // Inst #2237 = THDER
 6558   { 2238,	2,	1,	4,	423,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr },  // Inst #2238 = THDR
 6559   { 2239,	3,	0,	4,	256,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #2239 = TM
 6560   { 2240,	2,	0,	4,	258,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo173, -1 ,nullptr },  // Inst #2240 = TMHH
 6561   { 2241,	2,	0,	4,	259,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo173, -1 ,nullptr },  // Inst #2241 = TMHL
 6562   { 2242,	2,	0,	4,	260,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo152, -1 ,nullptr },  // Inst #2242 = TMLH
 6563   { 2243,	2,	0,	4,	261,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo152, -1 ,nullptr },  // Inst #2243 = TMLL
 6564   { 2244,	3,	0,	6,	256,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #2244 = TMY
 6565   { 2245,	3,	0,	6,	309,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #2245 = TP
 6566   { 2246,	2,	0,	4,	836,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #2246 = TPI
 6567   { 2247,	4,	0,	6,	786,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo245, -1 ,nullptr },  // Inst #2247 = TPROT
 6574   { 2254,	5,	2,	4,	287,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo323, -1 ,nullptr },  // Inst #2254 = TROO
 6575   { 2255,	4,	2,	4,	287,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo322, -1 ,nullptr },  // Inst #2255 = TROOOpt
 6576   { 2256,	5,	2,	4,	287,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo323, -1 ,nullptr },  // Inst #2256 = TROT
 6577   { 2257,	4,	2,	4,	287,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo322, -1 ,nullptr },  // Inst #2257 = TROTOpt
 6579   { 2259,	4,	2,	4,	286,	0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo324, -1 ,nullptr },  // Inst #2259 = TRTE
 6580   { 2260,	3,	2,	4,	286,	0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo325, -1 ,nullptr },  // Inst #2260 = TRTEOpt
 6581   { 2261,	5,	2,	4,	287,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo323, -1 ,nullptr },  // Inst #2261 = TRTO
 6582   { 2262,	4,	2,	4,	287,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo322, -1 ,nullptr },  // Inst #2262 = TRTOOpt
 6584   { 2264,	4,	2,	4,	286,	0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo324, -1 ,nullptr },  // Inst #2264 = TRTRE
 6585   { 2265,	3,	2,	4,	286,	0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo325, -1 ,nullptr },  // Inst #2265 = TRTREOpt
 6586   { 2266,	5,	2,	4,	287,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo323, -1 ,nullptr },  // Inst #2266 = TRTT
 6587   { 2267,	4,	2,	4,	287,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList8, ImplicitList1, OperandInfo322, -1 ,nullptr },  // Inst #2267 = TRTTOpt
 6588   { 2268,	2,	0,	4,	273,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #2268 = TS
 6589   { 2269,	2,	0,	4,	832,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList10, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #2269 = TSCH
 6591   { 2271,	5,	0,	6,	302,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo176, -1 ,nullptr },  // Inst #2271 = UNPKA
 6592   { 2272,	5,	0,	6,	302,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo176, -1 ,nullptr },  // Inst #2272 = UNPKU
 6609   { 2289,	5,	1,	6,	746,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo91, -1 ,nullptr },  // Inst #2289 = VAP
 6628   { 2308,	5,	1,	6,	628,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo91, -1 ,nullptr },  // Inst #2308 = VCEQ
 6630   { 2310,	3,	1,	6,	629,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2310 = VCEQBS
 6632   { 2312,	3,	1,	6,	629,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2312 = VCEQFS
 6634   { 2314,	3,	1,	6,	629,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2314 = VCEQGS
 6636   { 2316,	3,	1,	6,	629,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2316 = VCEQHS
 6642   { 2322,	5,	1,	6,	630,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo91, -1 ,nullptr },  // Inst #2322 = VCH
 6644   { 2324,	3,	1,	6,	631,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2324 = VCHBS
 6646   { 2326,	3,	1,	6,	631,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2326 = VCHFS
 6648   { 2328,	3,	1,	6,	631,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2328 = VCHGS
 6650   { 2330,	3,	1,	6,	631,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2330 = VCHHS
 6651   { 2331,	5,	1,	6,	632,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo91, -1 ,nullptr },  // Inst #2331 = VCHL
 6653   { 2333,	3,	1,	6,	633,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2333 = VCHLBS
 6655   { 2335,	3,	1,	6,	633,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2335 = VCHLFS
 6657   { 2337,	3,	1,	6,	633,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2337 = VCHLGS
 6659   { 2339,	3,	1,	6,	633,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2339 = VCHLHS
 6670   { 2350,	3,	0,	6,	752,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo332, -1 ,nullptr },  // Inst #2350 = VCP
 6677   { 2357,	3,	1,	6,	842,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo334, -1 ,nullptr },  // Inst #2357 = VCVB
 6678   { 2358,	3,	1,	6,	842,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo335, -1 ,nullptr },  // Inst #2358 = VCVBG
 6679   { 2359,	4,	1,	6,	744,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo336, -1 ,nullptr },  // Inst #2359 = VCVBGOpt
 6680   { 2360,	4,	1,	6,	744,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo337, -1 ,nullptr },  // Inst #2360 = VCVBOpt
 6681   { 2361,	4,	1,	6,	745,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo338, -1 ,nullptr },  // Inst #2361 = VCVD
 6682   { 2362,	4,	1,	6,	745,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo339, -1 ,nullptr },  // Inst #2362 = VCVDG
 6683   { 2363,	5,	1,	6,	748,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo91, -1 ,nullptr },  // Inst #2363 = VDP
 6684   { 2364,	3,	0,	6,	626,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo332, -1 ,nullptr },  // Inst #2364 = VEC
 6685   { 2365,	2,	0,	6,	626,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo333, -1 ,nullptr },  // Inst #2365 = VECB
 6686   { 2366,	2,	0,	6,	626,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo333, -1 ,nullptr },  // Inst #2366 = VECF
 6687   { 2367,	2,	0,	6,	626,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo333, -1 ,nullptr },  // Inst #2367 = VECG
 6688   { 2368,	2,	0,	6,	626,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo333, -1 ,nullptr },  // Inst #2368 = VECH
 6689   { 2369,	3,	0,	6,	627,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo332, -1 ,nullptr },  // Inst #2369 = VECL
 6690   { 2370,	2,	0,	6,	627,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo333, -1 ,nullptr },  // Inst #2370 = VECLB
 6691   { 2371,	2,	0,	6,	627,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo333, -1 ,nullptr },  // Inst #2371 = VECLF
 6692   { 2372,	2,	0,	6,	627,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo333, -1 ,nullptr },  // Inst #2372 = VECLG
 6693   { 2373,	2,	0,	6,	627,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo333, -1 ,nullptr },  // Inst #2373 = VECLH
 6741   { 2421,	5,	1,	6,	724,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo91, -1 ,nullptr },  // Inst #2421 = VFAE
 6743   { 2423,	4,	1,	6,	726,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo326, -1 ,nullptr },  // Inst #2423 = VFAEBS
 6745   { 2425,	4,	1,	6,	726,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo326, -1 ,nullptr },  // Inst #2425 = VFAEFS
 6747   { 2427,	4,	1,	6,	726,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo326, -1 ,nullptr },  // Inst #2427 = VFAEHS
 6749   { 2429,	4,	1,	6,	728,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo326, -1 ,nullptr },  // Inst #2429 = VFAEZBS
 6751   { 2431,	4,	1,	6,	728,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo326, -1 ,nullptr },  // Inst #2431 = VFAEZFS
 6753   { 2433,	4,	1,	6,	728,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo326, -1 ,nullptr },  // Inst #2433 = VFAEZHS
 6757   { 2437,	3,	1,	6,	710,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2437 = VFCEDBS
 6759   { 2439,	3,	1,	6,	713,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2439 = VFCESBS
 6762   { 2442,	3,	1,	6,	710,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2442 = VFCHDBS
 6765   { 2445,	3,	1,	6,	710,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2445 = VFCHEDBS
 6767   { 2447,	3,	1,	6,	713,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2447 = VFCHESBS
 6769   { 2449,	3,	1,	6,	713,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2449 = VFCHSBS
 6773   { 2453,	5,	1,	6,	729,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo91, -1 ,nullptr },  // Inst #2453 = VFEE
 6775   { 2455,	3,	1,	6,	730,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2455 = VFEEBS
 6777   { 2457,	3,	1,	6,	730,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2457 = VFEEFS
 6779   { 2459,	3,	1,	6,	730,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2459 = VFEEHS
 6781   { 2461,	3,	1,	6,	730,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2461 = VFEEZBS
 6783   { 2463,	3,	1,	6,	730,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2463 = VFEEZFS
 6785   { 2465,	3,	1,	6,	730,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2465 = VFEEZHS
 6786   { 2466,	5,	1,	6,	731,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo91, -1 ,nullptr },  // Inst #2466 = VFENE
 6788   { 2468,	3,	1,	6,	732,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2468 = VFENEBS
 6790   { 2470,	3,	1,	6,	732,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2470 = VFENEFS
 6792   { 2472,	3,	1,	6,	732,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2472 = VFENEHS
 6794   { 2474,	3,	1,	6,	732,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2474 = VFENEZBS
 6796   { 2476,	3,	1,	6,	732,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2476 = VFENEZFS
 6798   { 2478,	3,	1,	6,	732,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2478 = VFENEZHS
 6803   { 2483,	3,	1,	6,	711,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2483 = VFKEDBS
 6805   { 2485,	3,	1,	6,	713,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2485 = VFKESBS
 6807   { 2487,	3,	1,	6,	711,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2487 = VFKHDBS
 6809   { 2489,	3,	1,	6,	711,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2489 = VFKHEDBS
 6811   { 2491,	3,	1,	6,	713,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2491 = VFKHESBS
 6813   { 2493,	3,	1,	6,	713,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2493 = VFKHSBS
 6854   { 2534,	5,	1,	6,	673,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo330, -1 ,nullptr },  // Inst #2534 = VFTCI
 6855   { 2535,	3,	1,	6,	674,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo332, -1 ,nullptr },  // Inst #2535 = VFTCIDB
 6856   { 2536,	3,	1,	6,	675,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo332, -1 ,nullptr },  // Inst #2536 = VFTCISB
 6875   { 2555,	4,	1,	6,	733,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo331, -1 ,nullptr },  // Inst #2555 = VISTR
 6877   { 2557,	2,	1,	6,	734,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo333, -1 ,nullptr },  // Inst #2557 = VISTRBS
 6879   { 2559,	2,	1,	6,	734,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo333, -1 ,nullptr },  // Inst #2559 = VISTRFS
 6881   { 2561,	2,	1,	6,	734,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo333, -1 ,nullptr },  // Inst #2561 = VISTRHS
 7023   { 2703,	5,	1,	6,	747,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo91, -1 ,nullptr },  // Inst #2703 = VMP
 7036   { 2716,	5,	1,	6,	747,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo91, -1 ,nullptr },  // Inst #2716 = VMSP
 7061   { 2741,	5,	1,	6,	563,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo91, -1 ,nullptr },  // Inst #2741 = VPKLS
 7063   { 2743,	3,	1,	6,	564,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2743 = VPKLSFS
 7065   { 2745,	3,	1,	6,	564,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2745 = VPKLSGS
 7067   { 2747,	3,	1,	6,	564,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2747 = VPKLSHS
 7068   { 2748,	5,	1,	6,	561,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo91, -1 ,nullptr },  // Inst #2748 = VPKS
 7070   { 2750,	3,	1,	6,	562,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2750 = VPKSFS
 7072   { 2752,	3,	1,	6,	562,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2752 = VPKSGS
 7074   { 2754,	3,	1,	6,	562,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2754 = VPKSHS
 7081   { 2761,	5,	1,	6,	751,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo330, -1 ,nullptr },  // Inst #2761 = VPSOP
 7092   { 2772,	5,	1,	6,	748,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo91, -1 ,nullptr },  // Inst #2772 = VRP
 7107   { 2787,	5,	1,	6,	749,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo91, -1 ,nullptr },  // Inst #2787 = VSDP
 7120   { 2800,	5,	1,	6,	746,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo91, -1 ,nullptr },  // Inst #2800 = VSP
 7127   { 2807,	5,	1,	6,	750,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo330, -1 ,nullptr },  // Inst #2807 = VSRP
 7149   { 2829,	6,	1,	6,	735,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo345, -1 ,nullptr },  // Inst #2829 = VSTRC
 7151   { 2831,	5,	1,	6,	736,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo328, -1 ,nullptr },  // Inst #2831 = VSTRCBS
 7153   { 2833,	5,	1,	6,	736,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo328, -1 ,nullptr },  // Inst #2833 = VSTRCFS
 7155   { 2835,	5,	1,	6,	736,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo328, -1 ,nullptr },  // Inst #2835 = VSTRCHS
 7157   { 2837,	5,	1,	6,	738,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo328, -1 ,nullptr },  // Inst #2837 = VSTRCZBS
 7159   { 2839,	5,	1,	6,	738,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo328, -1 ,nullptr },  // Inst #2839 = VSTRCZFS
 7161   { 2841,	5,	1,	6,	738,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo328, -1 ,nullptr },  // Inst #2841 = VSTRCZHS
 7164   { 2844,	6,	1,	6,	739,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo345, -1 ,nullptr },  // Inst #2844 = VSTRS
 7165   { 2845,	5,	1,	6,	739,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo328, -1 ,nullptr },  // Inst #2845 = VSTRSB
 7166   { 2846,	5,	1,	6,	739,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo328, -1 ,nullptr },  // Inst #2846 = VSTRSF
 7167   { 2847,	5,	1,	6,	739,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo328, -1 ,nullptr },  // Inst #2847 = VSTRSH
 7168   { 2848,	4,	1,	6,	740,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo329, -1 ,nullptr },  // Inst #2848 = VSTRSZB
 7169   { 2849,	4,	1,	6,	740,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo329, -1 ,nullptr },  // Inst #2849 = VSTRSZF
 7170   { 2850,	4,	1,	6,	740,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo329, -1 ,nullptr },  // Inst #2850 = VSTRSZH
 7180   { 2860,	2,	0,	6,	634,	0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo333, -1 ,nullptr },  // Inst #2860 = VTM
 7181   { 2861,	1,	0,	6,	752,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo364, -1 ,nullptr },  // Inst #2861 = VTP
 7212   { 2892,	4,	0,	6,	718,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo366, -1 ,nullptr },  // Inst #2892 = WFC
 7213   { 2893,	2,	0,	6,	719,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo99, -1 ,nullptr },  // Inst #2893 = WFCDB
 7215   { 2895,	3,	1,	6,	856,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo368, -1 ,nullptr },  // Inst #2895 = WFCEDBS
 7217   { 2897,	3,	1,	6,	714,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo369, -1 ,nullptr },  // Inst #2897 = WFCESBS
 7219   { 2899,	3,	1,	6,	716,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2899 = WFCEXBS
 7221   { 2901,	3,	1,	6,	856,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo368, -1 ,nullptr },  // Inst #2901 = WFCHDBS
 7223   { 2903,	3,	1,	6,	856,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo368, -1 ,nullptr },  // Inst #2903 = WFCHEDBS
 7225   { 2905,	3,	1,	6,	714,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo369, -1 ,nullptr },  // Inst #2905 = WFCHESBS
 7227   { 2907,	3,	1,	6,	716,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2907 = WFCHEXBS
 7229   { 2909,	3,	1,	6,	714,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo369, -1 ,nullptr },  // Inst #2909 = WFCHSBS
 7231   { 2911,	3,	1,	6,	716,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2911 = WFCHXBS
 7232   { 2912,	2,	0,	6,	720,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo98, -1 ,nullptr },  // Inst #2912 = WFCSB
 7233   { 2913,	2,	0,	6,	721,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo333, -1 ,nullptr },  // Inst #2913 = WFCXB
 7240   { 2920,	4,	0,	6,	718,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo366, -1 ,nullptr },  // Inst #2920 = WFK
 7241   { 2921,	2,	0,	6,	719,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo99, -1 ,nullptr },  // Inst #2921 = WFKDB
 7243   { 2923,	3,	1,	6,	712,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo368, -1 ,nullptr },  // Inst #2923 = WFKEDBS
 7245   { 2925,	3,	1,	6,	715,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo369, -1 ,nullptr },  // Inst #2925 = WFKESBS
 7247   { 2927,	3,	1,	6,	717,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2927 = WFKEXBS
 7249   { 2929,	3,	1,	6,	712,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo368, -1 ,nullptr },  // Inst #2929 = WFKHDBS
 7251   { 2931,	3,	1,	6,	712,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo368, -1 ,nullptr },  // Inst #2931 = WFKHEDBS
 7253   { 2933,	3,	1,	6,	715,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo369, -1 ,nullptr },  // Inst #2933 = WFKHESBS
 7255   { 2935,	3,	1,	6,	717,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2935 = WFKHEXBS
 7257   { 2937,	3,	1,	6,	715,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo369, -1 ,nullptr },  // Inst #2937 = WFKHSBS
 7259   { 2939,	3,	1,	6,	717,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo327, -1 ,nullptr },  // Inst #2939 = WFKHXBS
 7260   { 2940,	2,	0,	6,	720,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo98, -1 ,nullptr },  // Inst #2940 = WFKSB
 7261   { 2941,	2,	0,	6,	721,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList3, ImplicitList1, OperandInfo333, -1 ,nullptr },  // Inst #2941 = WFKXB
 7305   { 2985,	3,	1,	6,	674,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo378, -1 ,nullptr },  // Inst #2985 = WFTCIDB
 7306   { 2986,	3,	1,	6,	675,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo379, -1 ,nullptr },  // Inst #2986 = WFTCISB
 7307   { 2987,	3,	1,	6,	676,	0, 0x0ULL, nullptr, ImplicitList1, OperandInfo332, -1 ,nullptr },  // Inst #2987 = WFTCIXB
 7310   { 2990,	5,	1,	4,	168,	0|(1ULL<<MCID::MayLoad), 0x23088ULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #2990 = X
 7311   { 2991,	5,	0,	6,	175,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo176, -1 ,nullptr },  // Inst #2991 = XC
 7312   { 2992,	5,	1,	6,	168,	0|(1ULL<<MCID::MayLoad), 0x2310cULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #2992 = XG
 7313   { 2993,	3,	1,	4,	171,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo111, -1 ,nullptr },  // Inst #2993 = XGR
 7314   { 2994,	3,	1,	4,	171,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo112, -1 ,nullptr },  // Inst #2994 = XGRK
 7315   { 2995,	3,	0,	4,	169,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #2995 = XI
 7316   { 2996,	3,	1,	6,	172,	0, 0x23000ULL, nullptr, ImplicitList1, OperandInfo115, -1 ,nullptr },  // Inst #2996 = XIHF
 7317   { 2997,	3,	1,	6,	173,	0, 0x23000ULL, nullptr, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #2997 = XILF
 7318   { 2998,	3,	0,	6,	169,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #2998 = XIY
 7319   { 2999,	3,	1,	2,	174,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #2999 = XR
 7320   { 3000,	3,	1,	4,	174,	0|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo117, -1 ,nullptr },  // Inst #3000 = XRK
 7321   { 3001,	0,	0,	4,	831,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList10, ImplicitList1, nullptr, -1 ,nullptr },  // Inst #3001 = XSCH
 7322   { 3002,	5,	1,	6,	168,	0|(1ULL<<MCID::MayLoad), 0x2308cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #3002 = XY
 7323   { 3003,	6,	0,	6,	304,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo118, -1 ,nullptr },  // Inst #3003 = ZAP