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References

gen/lib/Target/SystemZ/SystemZGenAsmMatcher.inc
 1664   case MCK_BDAddr32Disp20: {
 2200   case MCK_BDAddr32Disp20: return "MCK_BDAddr32Disp20";
 3145   { 1998 /* clclu */, SystemZ::CLCLU, Convert__GR1281_0__GR1281_1__Tie0_1_1__Tie1_1_1__BDAddr32Disp202_2, AMFBS_None, { MCK_GR128, MCK_GR128, MCK_BDAddr32Disp20 }, },
 3498   { 4206 /* ecag */, SystemZ::ECAG, Convert__GR641_0__GR641_1__BDAddr32Disp202_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_BDAddr32Disp20 }, },
 4078   { 7533 /* mvclu */, SystemZ::MVCLU, Convert__GR1281_0__GR1281_1__Tie0_1_1__Tie1_1_1__BDAddr32Disp202_2, AMFBS_None, { MCK_GR128, MCK_GR128, MCK_BDAddr32Disp20 }, },
 4188   { 8048 /* rll */, SystemZ::RLL, Convert__GR321_0__GR321_1__BDAddr32Disp202_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_BDAddr32Disp20 }, },
 4189   { 8052 /* rllg */, SystemZ::RLLG, Convert__GR641_0__GR641_1__BDAddr32Disp202_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_BDAddr32Disp20 }, },
 4302   { 8773 /* slag */, SystemZ::SLAG, Convert__GR641_0__GR641_1__BDAddr32Disp202_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_BDAddr32Disp20 }, },
 4303   { 8778 /* slak */, SystemZ::SLAK, Convert__GR321_0__GR321_1__BDAddr32Disp202_2, AMFBS_FeatureDistinctOps, { MCK_GR32, MCK_GR32, MCK_BDAddr32Disp20 }, },
 4321   { 8873 /* sllg */, SystemZ::SLLG, Convert__GR641_0__GR641_1__BDAddr32Disp202_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_BDAddr32Disp20 }, },
 4322   { 8878 /* sllk */, SystemZ::SLLK, Convert__GR321_0__GR321_1__BDAddr32Disp202_2, AMFBS_FeatureDistinctOps, { MCK_GR32, MCK_GR32, MCK_BDAddr32Disp20 }, },
 4346   { 8991 /* srag */, SystemZ::SRAG, Convert__GR641_0__GR641_1__BDAddr32Disp202_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_BDAddr32Disp20 }, },
 4347   { 8996 /* srak */, SystemZ::SRAK, Convert__GR321_0__GR321_1__BDAddr32Disp202_2, AMFBS_FeatureDistinctOps, { MCK_GR32, MCK_GR32, MCK_BDAddr32Disp20 }, },
 4353   { 9024 /* srlg */, SystemZ::SRLG, Convert__GR641_0__GR641_1__BDAddr32Disp202_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_BDAddr32Disp20 }, },
 4354   { 9029 /* srlk */, SystemZ::SRLK, Convert__GR321_0__GR321_1__BDAddr32Disp202_2, AMFBS_FeatureDistinctOps, { MCK_GR32, MCK_GR32, MCK_BDAddr32Disp20 }, },
 6124   { 1998 /* clclu */, 4 /* 2 */, MCK_BDAddr32Disp20, AMFBS_None },
 6715   { 4206 /* ecag */, 4 /* 2 */, MCK_BDAddr32Disp20, AMFBS_None },
 7541   { 7533 /* mvclu */, 4 /* 2 */, MCK_BDAddr32Disp20, AMFBS_None },
 7675   { 8048 /* rll */, 4 /* 2 */, MCK_BDAddr32Disp20, AMFBS_None },
 7677   { 8052 /* rllg */, 4 /* 2 */, MCK_BDAddr32Disp20, AMFBS_None },
 7801   { 8773 /* slag */, 4 /* 2 */, MCK_BDAddr32Disp20, AMFBS_None },
 7803   { 8778 /* slak */, 4 /* 2 */, MCK_BDAddr32Disp20, AMFBS_FeatureDistinctOps },
 7832   { 8873 /* sllg */, 4 /* 2 */, MCK_BDAddr32Disp20, AMFBS_None },
 7834   { 8878 /* sllk */, 4 /* 2 */, MCK_BDAddr32Disp20, AMFBS_FeatureDistinctOps },
 7866   { 8991 /* srag */, 4 /* 2 */, MCK_BDAddr32Disp20, AMFBS_None },
 7868   { 8996 /* srak */, 4 /* 2 */, MCK_BDAddr32Disp20, AMFBS_FeatureDistinctOps },
 7879   { 9024 /* srlg */, 4 /* 2 */, MCK_BDAddr32Disp20, AMFBS_None },
 7881   { 9029 /* srlk */, 4 /* 2 */, MCK_BDAddr32Disp20, AMFBS_FeatureDistinctOps },
 9139   case MCK_BDAddr32Disp20: