reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/Sparc/SparcGenAsmMatcher.inc
 2091     case SP::O6: OpKind = MCK_IntRegs; break;
gen/lib/Target/Sparc/SparcGenInstrInfo.inc
  766 static const MCPhysReg ImplicitList1[] = { SP::O6, 0 };
gen/lib/Target/Sparc/SparcGenRegisterInfo.inc
 1084   { SP::O6 },
 1131     SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5, SP::I6, SP::I7, SP::G0, SP::G1, SP::G2, SP::G3, SP::G4, SP::G5, SP::G6, SP::G7, SP::L0, SP::L1, SP::L2, SP::L3, SP::L4, SP::L5, SP::L6, SP::L7, SP::O0, SP::O1, SP::O2, SP::O3, SP::O4, SP::O5, SP::O6, SP::O7, 
 1151     SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5, SP::I6, SP::I7, SP::G0, SP::G1, SP::G2, SP::G3, SP::G4, SP::G5, SP::G6, SP::G7, SP::L0, SP::L1, SP::L2, SP::L3, SP::L4, SP::L5, SP::L6, SP::L7, SP::O0, SP::O1, SP::O2, SP::O3, SP::O4, SP::O5, SP::O6, SP::O7, 
 1266   { 14U, SP::O6 },
 1351   { 14U, SP::O6 },
 1501   { SP::O6, 14U },
 1586   { SP::O6, 14U },
lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
  132     Sparc::O4, Sparc::O5, Sparc::O6, Sparc::O7,
  998       RegNo = Sparc::O6;
lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
   65   SP::O4,  SP::O5,  SP::O6,  SP::O7,
lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
   39   unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
   49   unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
lib/Target/Sparc/SparcFrameLowering.cpp
   52     BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6)
   53       .addReg(SP::O6).addImm(NumBytes);
   68     BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6)
   69       .addReg(SP::O6).addReg(SP::G1);
   81   BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6)
   82     .addReg(SP::O6).addReg(SP::G1);
  187         .addReg(SP::O6).addImm(Bias);
  189       regUnbiased = SP::O6;
  198       BuildMI(MBB, MBBI, dl, TII.get(SP::ADDri), SP::O6)
  301     FrameReg = SP::O6; // %sp
  328            || MRI.isPhysRegUsed(SP::O6)    // %sp is used
lib/Target/Sparc/SparcISelLowering.cpp
  822       SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);
  843           SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);
  877           SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);
  886         SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);
  915     SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);
 1025     .Case("o4", SP::O4).Case("o5", SP::O5).Case("o6", SP::O6).Case("o7", SP::O7)
 1171         SDValue StackPtr = DAG.getRegister(SP::O6, PtrVT);
 1216     SDValue StackPtr = DAG.getRegister(SP::O6, PtrVT);
 1697   setStackPointerRegisterToSaveRestore(SP::O6);
 2593   unsigned SPReg = SP::O6;
lib/Target/Sparc/SparcRegisterInfo.cpp
   70   Reserved.set(SP::O6);