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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Sparc/SparcGenAsmMatcher.inc 2093 case SP::L0: OpKind = MCK_IntRegs; break;
gen/lib/Target/Sparc/SparcGenRegisterInfo.inc 1070 { SP::L0 },
1131 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5, SP::I6, SP::I7, SP::G0, SP::G1, SP::G2, SP::G3, SP::G4, SP::G5, SP::G6, SP::G7, SP::L0, SP::L1, SP::L2, SP::L3, SP::L4, SP::L5, SP::L6, SP::L7, SP::O0, SP::O1, SP::O2, SP::O3, SP::O4, SP::O5, SP::O6, SP::O7,
1151 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5, SP::I6, SP::I7, SP::G0, SP::G1, SP::G2, SP::G3, SP::G4, SP::G5, SP::G6, SP::G7, SP::L0, SP::L1, SP::L2, SP::L3, SP::L4, SP::L5, SP::L6, SP::L7, SP::O0, SP::O1, SP::O2, SP::O3, SP::O4, SP::O5, SP::O6, SP::O7,
1268 { 16U, SP::L0 },
1353 { 16U, SP::L0 },
1487 { SP::L0, 16U },
1572 { SP::L0, 16U },
lib/Target/Sparc/AsmParser/SparcAsmParser.cpp 133 Sparc::L0, Sparc::L1, Sparc::L2, Sparc::L3,
414 else if (Reg >= Sparc::L0 && Reg <= Sparc::L7)
415 regIdx = Reg - Sparc::L0 + 16;
lib/Target/Sparc/Disassembler/SparcDisassembler.cpp 66 SP::L0, SP::L1, SP::L2, SP::L3,
lib/Target/Sparc/SparcFrameLowering.cpp 313 for (unsigned reg = SP::L0; reg <= SP::L7; ++reg)
327 || MRI.isPhysRegUsed(SP::L0) // Too many registers needed
lib/Target/Sparc/SparcISelLowering.cpp 1026 .Case("l0", SP::L0).Case("l1", SP::L1).Case("l2", SP::L2).Case("l3", SP::L3)