|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/Sparc/SparcGenAsmMatcher.inc 2107 case SP::I6: OpKind = MCK_IntRegs; break;
gen/lib/Target/Sparc/SparcGenRegisterInfo.inc 1068 { SP::I6 },
1131 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5, SP::I6, SP::I7, SP::G0, SP::G1, SP::G2, SP::G3, SP::G4, SP::G5, SP::G6, SP::G7, SP::L0, SP::L1, SP::L2, SP::L3, SP::L4, SP::L5, SP::L6, SP::L7, SP::O0, SP::O1, SP::O2, SP::O3, SP::O4, SP::O5, SP::O6, SP::O7,
1151 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5, SP::I6, SP::I7, SP::G0, SP::G1, SP::G2, SP::G3, SP::G4, SP::G5, SP::G6, SP::G7, SP::L0, SP::L1, SP::L2, SP::L3, SP::L4, SP::L5, SP::L6, SP::L7, SP::O0, SP::O1, SP::O2, SP::O3, SP::O4, SP::O5, SP::O6, SP::O7,
1282 { 30U, SP::I6 },
1367 { 30U, SP::I6 },
1485 { SP::I6, 30U },
1570 { SP::I6, 30U },
lib/Target/Sparc/AsmParser/SparcAsmParser.cpp 136 Sparc::I4, Sparc::I5, Sparc::I6, Sparc::I7 };
992 RegNo = Sparc::I6;
lib/Target/Sparc/Disassembler/SparcDisassembler.cpp 69 SP::I4, SP::I5, SP::I6, SP::I7 };
lib/Target/Sparc/SparcFrameLowering.cpp 158 unsigned regFP = RegInfo.getDwarfRegNum(SP::I6, true);
lib/Target/Sparc/SparcISelLowering.cpp 1023 .Case("i4", SP::I4).Case("i5", SP::I5).Case("i6", SP::I6).Case("i7", SP::I7)
2513 DAG.getNode(ISD::ADD, DL, PtrVT, DAG.getRegister(SP::I6, PtrVT),
2622 unsigned FrameReg = SP::I6;
lib/Target/Sparc/SparcRegisterInfo.cpp 71 Reserved.set(SP::I6);
216 return SP::I6;