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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Sparc/SparcGenInstrInfo.inc 1148 { 218, 2, 0, 4, 1, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #218 = BINDrr
1189 { 259, 2, 0, 4, 3, 0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, ImplicitList1, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #259 = CALLrr
1261 { 331, 2, 0, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #331 = FLUSHrr
1382 { 452, 2, 0, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #452 = LDCSRrr
1395 { 465, 2, 0, 4, 15, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList6, OperandInfo46, -1 ,nullptr }, // Inst #465 = LDFSRrr
1419 { 489, 2, 0, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList6, OperandInfo46, -1 ,nullptr }, // Inst #489 = LDXFSRrr
1482 { 552, 2, 0, 4, 3, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #552 = RETTrr
1519 { 589, 2, 1, 4, 19, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #589 = STCSRrr
1524 { 594, 2, 1, 4, 20, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList13, OperandInfo46, -1 ,nullptr }, // Inst #594 = STDCQrr
1529 { 599, 2, 1, 4, 20, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList14, OperandInfo46, -1 ,nullptr }, // Inst #599 = STDFQrr
1536 { 606, 2, 1, 4, 19, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList6, OperandInfo46, -1 ,nullptr }, // Inst #606 = STFSRrr
1546 { 616, 2, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList6, OperandInfo46, -1 ,nullptr }, // Inst #616 = STXFSRrr