|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/Sparc/SparcGenInstrInfo.inc 1108 { 178, 4, 1, 4, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList4, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #178 = SELECT_CC_DFP_ICC
1110 { 180, 4, 1, 4, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList4, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #180 = SELECT_CC_FP_ICC
1112 { 182, 4, 1, 4, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList4, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #182 = SELECT_CC_Int_ICC
1114 { 184, 4, 1, 4, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList4, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #184 = SELECT_CC_QFP_ICC
1116 { 186, 3, 1, 4, 1, 0, 0x0ULL, nullptr, ImplicitList4, OperandInfo41, -1 ,nullptr }, // Inst #186 = ADDCCri
1117 { 187, 3, 1, 4, 1, 0, 0x0ULL, nullptr, ImplicitList4, OperandInfo42, -1 ,nullptr }, // Inst #187 = ADDCCrr
1118 { 188, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #188 = ADDCri
1119 { 189, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo42, -1 ,nullptr }, // Inst #189 = ADDCrr
1120 { 190, 3, 1, 4, 1, 0, 0x0ULL, ImplicitList4, ImplicitList4, OperandInfo41, -1 ,nullptr }, // Inst #190 = ADDEri
1120 { 190, 3, 1, 4, 1, 0, 0x0ULL, ImplicitList4, ImplicitList4, OperandInfo41, -1 ,nullptr }, // Inst #190 = ADDEri
1121 { 191, 3, 1, 4, 1, 0, 0x0ULL, ImplicitList4, ImplicitList4, OperandInfo42, -1 ,nullptr }, // Inst #191 = ADDErr
1121 { 191, 3, 1, 4, 1, 0, 0x0ULL, ImplicitList4, ImplicitList4, OperandInfo42, -1 ,nullptr }, // Inst #191 = ADDErr
1122 { 192, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #192 = ADDXC
1123 { 193, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, ImplicitList4, OperandInfo43, -1 ,nullptr }, // Inst #193 = ADDXCCC
1123 { 193, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, ImplicitList4, OperandInfo43, -1 ,nullptr }, // Inst #193 = ADDXCCC
1130 { 200, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo41, -1 ,nullptr }, // Inst #200 = ANDCCri
1131 { 201, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo42, -1 ,nullptr }, // Inst #201 = ANDCCrr
1132 { 202, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo41, -1 ,nullptr }, // Inst #202 = ANDNCCri
1133 { 203, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo42, -1 ,nullptr }, // Inst #203 = ANDNCCrr
1145 { 215, 2, 0, 4, 1, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr }, // Inst #215 = BCOND
1146 { 216, 2, 0, 4, 1, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr }, // Inst #216 = BCONDA
1162 { 232, 2, 0, 4, 1, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr }, // Inst #232 = BPICC
1163 { 233, 2, 0, 4, 1, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr }, // Inst #233 = BPICCA
1164 { 234, 2, 0, 4, 1, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr }, // Inst #234 = BPICCANT
1165 { 235, 2, 0, 4, 1, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr }, // Inst #235 = BPICCNT
1178 { 248, 2, 0, 4, 1, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr }, // Inst #248 = BPXCC
1179 { 249, 2, 0, 4, 1, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr }, // Inst #249 = BPXCCA
1180 { 250, 2, 0, 4, 1, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr }, // Inst #250 = BPXCCANT
1181 { 251, 2, 0, 4, 1, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo7, -1 ,nullptr }, // Inst #251 = BPXCCNT
1199 { 269, 2, 0, 4, 1, 0, 0x0ULL, nullptr, ImplicitList4, OperandInfo54, -1 ,nullptr }, // Inst #269 = CMPri
1200 { 270, 2, 0, 4, 1, 0, 0x0ULL, nullptr, ImplicitList4, OperandInfo55, -1 ,nullptr }, // Inst #270 = CMPrr
1265 { 335, 4, 1, 4, 0, 0, 0x0ULL, ImplicitList4, nullptr, OperandInfo68, -1 ,nullptr }, // Inst #335 = FMOVD_ICC
1266 { 336, 4, 1, 4, 0, 0, 0x0ULL, ImplicitList4, nullptr, OperandInfo68, -1 ,nullptr }, // Inst #336 = FMOVD_XCC
1269 { 339, 4, 1, 4, 0, 0, 0x0ULL, ImplicitList4, nullptr, OperandInfo69, -1 ,nullptr }, // Inst #339 = FMOVQ_ICC
1270 { 340, 4, 1, 4, 0, 0, 0x0ULL, ImplicitList4, nullptr, OperandInfo69, -1 ,nullptr }, // Inst #340 = FMOVQ_XCC
1291 { 361, 4, 1, 4, 0, 0, 0x0ULL, ImplicitList4, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #361 = FMOVS_ICC
1292 { 362, 4, 1, 4, 0, 0, 0x0ULL, ImplicitList4, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #362 = FMOVS_XCC
1431 { 501, 4, 1, 4, 0, 0, 0x0ULL, ImplicitList4, nullptr, OperandInfo100, -1 ,nullptr }, // Inst #501 = MOVICCri
1432 { 502, 4, 1, 4, 0, 0, 0x0ULL, ImplicitList4, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #502 = MOVICCrr
1448 { 518, 4, 1, 4, 0, 0, 0x0ULL, ImplicitList4, nullptr, OperandInfo100, -1 ,nullptr }, // Inst #518 = MOVXCCri
1449 { 519, 4, 1, 4, 0, 0, 0x0ULL, ImplicitList4, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #519 = MOVXCCrr
1456 { 526, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo41, -1 ,nullptr }, // Inst #526 = ORCCri
1457 { 527, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo42, -1 ,nullptr }, // Inst #527 = ORCCrr
1458 { 528, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo41, -1 ,nullptr }, // Inst #528 = ORNCCri
1459 { 529, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo42, -1 ,nullptr }, // Inst #529 = ORNCCrr
1551 { 621, 3, 1, 4, 1, 0, 0x0ULL, nullptr, ImplicitList4, OperandInfo41, -1 ,nullptr }, // Inst #621 = SUBCCri
1552 { 622, 3, 1, 4, 1, 0, 0x0ULL, nullptr, ImplicitList4, OperandInfo42, -1 ,nullptr }, // Inst #622 = SUBCCrr
1553 { 623, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #623 = SUBCri
1554 { 624, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo42, -1 ,nullptr }, // Inst #624 = SUBCrr
1555 { 625, 3, 1, 4, 1, 0, 0x0ULL, ImplicitList4, ImplicitList4, OperandInfo41, -1 ,nullptr }, // Inst #625 = SUBEri
1555 { 625, 3, 1, 4, 1, 0, 0x0ULL, ImplicitList4, ImplicitList4, OperandInfo41, -1 ,nullptr }, // Inst #625 = SUBEri
1556 { 626, 3, 1, 4, 1, 0, 0x0ULL, ImplicitList4, ImplicitList4, OperandInfo42, -1 ,nullptr }, // Inst #626 = SUBErr
1556 { 626, 3, 1, 4, 1, 0, 0x0ULL, ImplicitList4, ImplicitList4, OperandInfo42, -1 ,nullptr }, // Inst #626 = SUBErr
1567 { 637, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo41, -1 ,nullptr }, // Inst #637 = TADDCCTVri
1568 { 638, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo42, -1 ,nullptr }, // Inst #638 = TADDCCTVrr
1569 { 639, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo41, -1 ,nullptr }, // Inst #639 = TADDCCri
1570 { 640, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo42, -1 ,nullptr }, // Inst #640 = TADDCCrr
1571 { 641, 3, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #641 = TICCri
1572 { 642, 3, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #642 = TICCrr
1578 { 648, 3, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #648 = TRAPri
1579 { 649, 3, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #649 = TRAPrr
1580 { 650, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo41, -1 ,nullptr }, // Inst #650 = TSUBCCTVri
1581 { 651, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo42, -1 ,nullptr }, // Inst #651 = TSUBCCTVrr
1582 { 652, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo41, -1 ,nullptr }, // Inst #652 = TSUBCCri
1583 { 653, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo42, -1 ,nullptr }, // Inst #653 = TSUBCCrr
1584 { 654, 3, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #654 = TXCCri
1585 { 655, 3, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList4, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #655 = TXCCrr
1623 { 693, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo41, -1 ,nullptr }, // Inst #693 = XNORCCri
1624 { 694, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo42, -1 ,nullptr }, // Inst #694 = XNORCCrr
1628 { 698, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo41, -1 ,nullptr }, // Inst #698 = XORCCri
1629 { 699, 3, 1, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList4, OperandInfo42, -1 ,nullptr }, // Inst #699 = XORCCrr