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References

gen/lib/Target/RISCV/RISCVGenAsmMatcher.inc
 2332   { 2378 /* sd */, RISCV::SD, Convert__Reg1_0__Reg1_2__imm_95_0, AMFBS_IsRV64, { MCK_GPR, MCK__40_, MCK_GPR, MCK__41_ }, },
 2333   { 2378 /* sd */, RISCV::SD, Convert__Reg1_0__Reg1_3__SImm121_1, AMFBS_IsRV64, { MCK_GPR, MCK_SImm12, MCK__40_, MCK_GPR, MCK__41_ }, },
gen/lib/Target/RISCV/RISCVGenCompressInstEmitter.inc
  706     case RISCV::SD: {
 1600       OutInst.setOpcode(RISCV::SD);
 1618       OutInst.setOpcode(RISCV::SD);
gen/lib/Target/RISCV/RISCVGenDAGISel.inc
 2855 /*  5270*/              OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 2864 /*  5287*/              OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 2973 /*  5488*/              OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 2982 /*  5505*/              OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 3071 /*  5659*/              OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 3079 /*  5673*/              OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 3182 /*  5871*/            OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 3191 /*  5889*/            OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 3282 /*  6057*/              OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 3290 /*  6072*/              OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 3363 /*  6207*/            OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 3428 /*  6329*/            OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 3477 /*  6416*/            OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 3536 /*  6531*/          OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 3587 /*  6627*/            OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 4038 /*  7464*/              OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 4047 /*  7481*/              OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 4093 /*  7566*/            OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 4180 /*  7728*/              OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 4189 /*  7745*/              OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 4257 /*  7863*/              OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 4265 /*  7877*/              OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 4311 /*  7963*/            OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 4347 /*  8027*/            OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 4430 /*  8188*/              OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 4439 /*  8206*/              OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 4483 /*  8292*/            OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 4556 /*  8426*/            OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 4564 /*  8441*/            OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
 4606 /*  8518*/          OPC_MorphNodeTo0, TARGET_VAL(RISCV::SD), 0|OPFL_Chain|OPFL_MemRefs,
gen/lib/Target/RISCV/RISCVGenGlobalISel.inc
 3808         GIR_BuildMI, /*InsnID*/0, /*Opcode*/RISCV::SD,
 3836         GIR_BuildMI, /*InsnID*/0, /*Opcode*/RISCV::SD,
 3971         GIR_BuildMI, /*InsnID*/0, /*Opcode*/RISCV::SD,
 3988         GIR_BuildMI, /*InsnID*/0, /*Opcode*/RISCV::SD,
 4102         GIR_BuildMI, /*InsnID*/0, /*Opcode*/RISCV::SD,
 4220         GIR_BuildMI, /*InsnID*/0, /*Opcode*/RISCV::SD,
gen/lib/Target/RISCV/RISCVGenMCCodeEmitter.inc
  739     case RISCV::SD:
lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
 1822     emitLoadStoreSymbol(Inst, RISCV::SD, IDLoc, Out, /*HasTmpReg=*/true);
lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  235     case RISCV::SD:
lib/Target/RISCV/RISCVInstrInfo.cpp
   71   case RISCV::SD:
  123              RISCV::SW : RISCV::SD;
lib/Target/RISCV/RISCVMergeBaseOffset.cpp
  224   case RISCV::SD: