reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/RISCV/RISCVGenInstrInfo.inc
  847   { 185,	6,	2,	4,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #185 = PseudoCmpXchg32
  848   { 186,	6,	2,	4,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #186 = PseudoCmpXchg64
  865   { 203,	6,	2,	4,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #203 = PseudoMaskedAtomicLoadAdd32
  868   { 206,	6,	2,	4,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #206 = PseudoMaskedAtomicLoadNand32
  869   { 207,	6,	2,	4,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #207 = PseudoMaskedAtomicLoadSub32
  872   { 210,	6,	2,	4,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #210 = PseudoMaskedAtomicSwap32