reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

gen/lib/Target/PowerPC/PPCGenRegisterInfo.inc
 3868   extern const TargetRegisterClass F4RCRegClass;

References

gen/lib/Target/PowerPC/PPCGenFastISel.inc
  318     return fastEmitInst_r(PPC::FABSS, &PPC::F4RCRegClass, Op0, Op0IsKill);
  395     return fastEmitInst_r(PPC::FRIPS, &PPC::F4RCRegClass, Op0, Op0IsKill);
  462     return fastEmitInst_r(PPC::FRIMS, &PPC::F4RCRegClass, Op0, Op0IsKill);
  573     return fastEmitInst_r(PPC::FNEGS, &PPC::F4RCRegClass, Op0, Op0IsKill);
  681     return fastEmitInst_r(PPC::FRSP, &PPC::F4RCRegClass, Op0, Op0IsKill);
  811     return fastEmitInst_r(PPC::FRINS, &PPC::F4RCRegClass, Op0, Op0IsKill);
  878     return fastEmitInst_r(PPC::FSQRTS, &PPC::F4RCRegClass, Op0, Op0IsKill);
  939     return fastEmitInst_r(PPC::FRIZS, &PPC::F4RCRegClass, Op0, Op0IsKill);
 1199   return fastEmitInst_r(PPC::FCFIDS, &PPC::F4RCRegClass, Op0, Op0IsKill);
 1235   return fastEmitInst_r(PPC::FCFIDUS, &PPC::F4RCRegClass, Op0, Op0IsKill);
 1369     return fastEmitInst_r(PPC::FRES, &PPC::F4RCRegClass, Op0, Op0IsKill);
 1439     return fastEmitInst_r(PPC::FRSQRTES, &PPC::F4RCRegClass, Op0, Op0IsKill);
 1931     return fastEmitInst_rr(PPC::FADDS, &PPC::F4RCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
 2017     return fastEmitInst_rr(PPC::FDIVS, &PPC::F4RCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
 2179     return fastEmitInst_rr(PPC::FMULS, &PPC::F4RCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
 2262     return fastEmitInst_rr(PPC::FSUBS, &PPC::F4RCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/PowerPC/PPCGenRegisterInfo.inc
 4182   &PPC::F4RCRegClass,
 4209   &PPC::F4RCRegClass,
 4786     &PPC::F4RCRegClass,
lib/Target/PowerPC/PPCAsmPrinter.cpp
  551           if (PPC::F4RCRegClass.contains(Reg) ||
lib/Target/PowerPC/PPCFastISel.cpp
  472        (VT == MVT::f32 ? (HasSPE ? &PPC::GPRCRegClass : &PPC::F4RCRegClass) :
  889           SrcReg1 = copyRegToRegClass(&PPC::F4RCRegClass, SrcReg1);
  891           SrcReg2 = copyRegToRegClass(&PPC::F4RCRegClass, SrcReg2);
 1002     DestReg = createResultReg(&PPC::F4RCRegClass);
 1218   if (InRC == &PPC::F4RCRegClass)
 2007     RC = ((VT == MVT::f32) ? &PPC::F4RCRegClass : &PPC::F8RCRegClass);
lib/Target/PowerPC/PPCISelLowering.cpp
  151       addRegisterClass(MVT::f32, &PPC::F4RCRegClass);
 3498             RC = &PPC::F4RCRegClass;
 3943                                   : &PPC::F4RCRegClass);
 4347           VReg = MF.addLiveIn(FPR[FPR_idx], &PPC::F4RCRegClass);
14332           return std::make_pair(0U, &PPC::F4RCRegClass);
lib/Target/PowerPC/PPCInstrInfo.cpp
  987   else if (PPC::F4RCRegClass.contains(DestReg, SrcReg))
 1042     } else if (PPC::F4RCRegClass.hasSubClassEq(RC)) {
 1080     } else if (PPC::F4RCRegClass.contains(Reg)) {
 1128     } else if (PPC::F4RCRegClass.hasSubClassEq(RC)) {
 1166     } else if (PPC::F4RCRegClass.contains(Reg)) {
lib/Target/PowerPC/PPCRegisterInfo.cpp
  475     else if (RC == &PPC::F4RCRegClass && Subtarget.hasP8Vector())