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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/PowerPC/PPCGenAsmMatcher.inc 5225 { 2908 /* clrldi */, PPC::RLDICLo, Convert__RegG8RC1_1__RegG8RC1_2__imm_95_0__U6Imm1_3, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, },
6213 { 9078 /* rldicl */, PPC::RLDICLo, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__U6Imm1_4, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm, MCK_U6Imm }, },
6233 { 9125 /* rotldi */, PPC::RLDICLo, Convert__RegG8RC1_1__RegG8RC1_2__U6Imm1_3__imm_95_0, AMFBS_None, { MCK__DOT_, MCK_RegG8RC, MCK_RegG8RC, MCK_U6Imm }, },
gen/lib/Target/PowerPC/PPCGenAsmWriter.inc 9990 case PPC::RLDICLo:
gen/lib/Target/PowerPC/PPCGenInstrInfo.inc12318 { PPC::RLDICLo, PPC::RLDICL },
12483 { PPC::RLDICL, PPC::RLDICLo },
gen/lib/Target/PowerPC/PPCGenMCCodeEmitter.inc 3848 case PPC::RLDICLo:
lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp 954 TmpInst.setOpcode(Opcode == PPC::EXTRDI? PPC::RLDICL : PPC::RLDICLo);
980 TmpInst.setOpcode(Opcode == PPC::ROTRDI? PPC::RLDICL : PPC::RLDICLo);
1013 TmpInst.setOpcode(Opcode == PPC::SRDI? PPC::RLDICL : PPC::RLDICLo);
lib/Target/PowerPC/PPCInstrInfo.cpp 2378 Opc == PPC::RLDICL || Opc == PPC::RLDICLo ||
2882 case PPC::RLDICLo:
2888 APInt InVal((Opc == PPC::RLDICL || Opc == PPC::RLDICLo) ?
2897 (Opc == PPC::RLDICLo && isUInt<16>(InVal.getSExtValue()))) {
2901 SetCR = Opc == PPC::RLDICLo;
3174 case PPC::RLDCLo: III.ImmOpcode = PPC::RLDICLo; break;
3180 case PPC::SRDo: III.ImmOpcode = PPC::RLDICLo; break;
3923 if ((Opcode == PPC::RLDICL || Opcode == PPC::RLDICLo ||
lib/Target/PowerPC/PPCMIPeephole.cpp 163 if (Opcode == PPC::RLDICL || Opcode == PPC::RLDICLo ||