|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/PowerPC/PPCGenInstrInfo.inc 3288 { 380, 1, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #380 = BCCTR
3289 { 381, 1, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList10, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #381 = BCCTR8
3290 { 382, 1, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList10, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #382 = BCCTR8n
3291 { 383, 1, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList12, OperandInfo70, -1 ,nullptr }, // Inst #383 = BCCTRL
3292 { 384, 1, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList13, ImplicitList14, OperandInfo70, -1 ,nullptr }, // Inst #384 = BCCTRL8
3293 { 385, 1, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList13, ImplicitList14, OperandInfo70, -1 ,nullptr }, // Inst #385 = BCCTRL8n
3294 { 386, 1, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList12, OperandInfo70, -1 ,nullptr }, // Inst #386 = BCCTRLn
3295 { 387, 1, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #387 = BCCTRn
3310 { 402, 1, 0, 4, 287, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList15, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #402 = BCLR
3311 { 403, 1, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList15, ImplicitList12, OperandInfo70, -1 ,nullptr }, // Inst #403 = BCLRL
3312 { 404, 1, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList15, ImplicitList12, OperandInfo70, -1 ,nullptr }, // Inst #404 = BCLRLn
3313 { 405, 1, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #405 = BCLRn
3420 { 512, 1, 1, 4, 129, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #512 = CRSET
3421 { 513, 1, 1, 4, 129, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #513 = CRUNSET