|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/PowerPC/PPCGenInstrInfo.inc 3230 { 322, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #322 = ATOMIC_LOAD_ADD_I16
3231 { 323, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #323 = ATOMIC_LOAD_ADD_I32
3233 { 325, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #325 = ATOMIC_LOAD_ADD_I8
3234 { 326, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #326 = ATOMIC_LOAD_AND_I16
3235 { 327, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #327 = ATOMIC_LOAD_AND_I32
3237 { 329, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #329 = ATOMIC_LOAD_AND_I8
3238 { 330, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #330 = ATOMIC_LOAD_MAX_I16
3239 { 331, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #331 = ATOMIC_LOAD_MAX_I32
3241 { 333, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #333 = ATOMIC_LOAD_MAX_I8
3242 { 334, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #334 = ATOMIC_LOAD_MIN_I16
3243 { 335, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #335 = ATOMIC_LOAD_MIN_I32
3245 { 337, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #337 = ATOMIC_LOAD_MIN_I8
3246 { 338, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #338 = ATOMIC_LOAD_NAND_I16
3247 { 339, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #339 = ATOMIC_LOAD_NAND_I32
3249 { 341, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #341 = ATOMIC_LOAD_NAND_I8
3250 { 342, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #342 = ATOMIC_LOAD_OR_I16
3251 { 343, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #343 = ATOMIC_LOAD_OR_I32
3253 { 345, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #345 = ATOMIC_LOAD_OR_I8
3254 { 346, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #346 = ATOMIC_LOAD_SUB_I16
3255 { 347, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #347 = ATOMIC_LOAD_SUB_I32
3257 { 349, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #349 = ATOMIC_LOAD_SUB_I8
3258 { 350, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #350 = ATOMIC_LOAD_UMAX_I16
3259 { 351, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #351 = ATOMIC_LOAD_UMAX_I32
3261 { 353, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #353 = ATOMIC_LOAD_UMAX_I8
3262 { 354, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #354 = ATOMIC_LOAD_UMIN_I16
3263 { 355, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #355 = ATOMIC_LOAD_UMIN_I32
3265 { 357, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #357 = ATOMIC_LOAD_UMIN_I8
3266 { 358, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #358 = ATOMIC_LOAD_XOR_I16
3267 { 359, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #359 = ATOMIC_LOAD_XOR_I32
3269 { 361, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #361 = ATOMIC_LOAD_XOR_I8
3270 { 362, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #362 = ATOMIC_SWAP_I16
3271 { 363, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #363 = ATOMIC_SWAP_I32
3273 { 365, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo65, -1 ,nullptr }, // Inst #365 = ATOMIC_SWAP_I8