|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/PowerPC/PPCGenInstrInfo.inc 4990 { 2082, 3, 1, 4, 142, 0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2082 = XVADDDP
4991 { 2083, 3, 1, 4, 142, 0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2083 = XVADDSP
4992 { 2084, 3, 1, 4, 138, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2084 = XVCMPEQDP
4993 { 2085, 3, 1, 4, 138, 0, 0x0ULL, ImplicitList2, ImplicitList16, OperandInfo289, -1 ,nullptr }, // Inst #2085 = XVCMPEQDPo
4994 { 2086, 3, 1, 4, 138, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2086 = XVCMPEQSP
4995 { 2087, 3, 1, 4, 138, 0, 0x0ULL, ImplicitList2, ImplicitList16, OperandInfo289, -1 ,nullptr }, // Inst #2087 = XVCMPEQSPo
4996 { 2088, 3, 1, 4, 138, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2088 = XVCMPGEDP
4997 { 2089, 3, 1, 4, 138, 0, 0x0ULL, ImplicitList2, ImplicitList16, OperandInfo289, -1 ,nullptr }, // Inst #2089 = XVCMPGEDPo
4998 { 2090, 3, 1, 4, 138, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2090 = XVCMPGESP
4999 { 2091, 3, 1, 4, 138, 0, 0x0ULL, ImplicitList2, ImplicitList16, OperandInfo289, -1 ,nullptr }, // Inst #2091 = XVCMPGESPo
5000 { 2092, 3, 1, 4, 138, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2092 = XVCMPGTDP
5001 { 2093, 3, 1, 4, 138, 0, 0x0ULL, ImplicitList2, ImplicitList16, OperandInfo289, -1 ,nullptr }, // Inst #2093 = XVCMPGTDPo
5002 { 2094, 3, 1, 4, 138, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2094 = XVCMPGTSP
5003 { 2095, 3, 1, 4, 138, 0, 0x0ULL, ImplicitList2, ImplicitList16, OperandInfo289, -1 ,nullptr }, // Inst #2095 = XVCMPGTSPo
5004 { 2096, 3, 1, 4, 98, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2096 = XVCPSGNDP
5005 { 2097, 3, 1, 4, 98, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2097 = XVCPSGNSP
5026 { 2118, 3, 1, 4, 274, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2118 = XVDIVDP
5027 { 2119, 3, 1, 4, 273, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2119 = XVDIVSP
5028 { 2120, 3, 1, 4, 98, 0, 0x0ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2120 = XVIEXPDP
5029 { 2121, 3, 1, 4, 98, 0, 0x0ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2121 = XVIEXPSP
5034 { 2126, 3, 1, 4, 140, 0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2126 = XVMAXDP
5035 { 2127, 3, 1, 4, 140, 0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2127 = XVMAXSP
5036 { 2128, 3, 1, 4, 140, 0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2128 = XVMINDP
5037 { 2129, 3, 1, 4, 140, 0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2129 = XVMINSP
5042 { 2134, 3, 1, 4, 142, 0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2134 = XVMULDP
5043 { 2135, 3, 1, 4, 142, 0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2135 = XVMULSP
5072 { 2164, 3, 1, 4, 142, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2164 = XVSUBDP
5073 { 2165, 3, 1, 4, 142, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2165 = XVSUBSP
5090 { 2182, 3, 1, 4, 97, 0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2182 = XXLAND
5091 { 2183, 3, 1, 4, 97, 0, 0x0ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2183 = XXLANDC
5092 { 2184, 3, 1, 4, 97, 0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2184 = XXLEQV
5094 { 2186, 3, 1, 4, 97, 0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2186 = XXLNAND
5095 { 2187, 3, 1, 4, 97, 0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2187 = XXLNOR
5096 { 2188, 3, 1, 4, 97, 0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2188 = XXLOR
5097 { 2189, 3, 1, 4, 97, 0, 0x0ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2189 = XXLORC
5099 { 2191, 3, 1, 4, 97, 0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2191 = XXLXOR
5103 { 2195, 3, 1, 4, 161, 0, 0x0ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2195 = XXMRGHW
5104 { 2196, 3, 1, 4, 161, 0, 0x0ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2196 = XXMRGLW
5105 { 2197, 3, 1, 4, 161, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2197 = XXPERM
5108 { 2200, 3, 1, 4, 161, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #2200 = XXPERMR