|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/PowerPC/PPCGenInstrInfo.inc 3746 { 838, 2, 1, 4, 131, 0, 0x18ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #838 = FABSD
3747 { 839, 2, 1, 4, 246, 0, 0x18ULL, nullptr, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #839 = FABSDo
3755 { 847, 2, 1, 4, 148, 0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #847 = FCFID
3758 { 850, 2, 1, 4, 148, 0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #850 = FCFIDU
3761 { 853, 2, 1, 4, 156, 0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #853 = FCFIDUo
3762 { 854, 2, 1, 4, 156, 0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #854 = FCFIDo
3769 { 861, 2, 1, 4, 148, 0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #861 = FCTID
3770 { 862, 2, 1, 4, 148, 0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #862 = FCTIDU
3771 { 863, 2, 1, 4, 148, 0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #863 = FCTIDUZ
3772 { 864, 2, 1, 4, 156, 0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #864 = FCTIDUZo
3773 { 865, 2, 1, 4, 156, 0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #865 = FCTIDUo
3774 { 866, 2, 1, 4, 148, 0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #866 = FCTIDZ
3775 { 867, 2, 1, 4, 156, 0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #867 = FCTIDZo
3776 { 868, 2, 1, 4, 156, 0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #868 = FCTIDo
3777 { 869, 2, 1, 4, 148, 0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #869 = FCTIW
3778 { 870, 2, 1, 4, 148, 0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #870 = FCTIWU
3779 { 871, 2, 1, 4, 148, 0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #871 = FCTIWUZ
3780 { 872, 2, 1, 4, 156, 0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #872 = FCTIWUZo
3781 { 873, 2, 1, 4, 156, 0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #873 = FCTIWUo
3782 { 874, 2, 1, 4, 148, 0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #874 = FCTIWZ
3783 { 875, 2, 1, 4, 156, 0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #875 = FCTIWZo
3784 { 876, 2, 1, 4, 156, 0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #876 = FCTIWo
3803 { 895, 2, 1, 4, 131, 0, 0x18ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #895 = FNABSD
3804 { 896, 2, 1, 4, 246, 0, 0x18ULL, nullptr, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #896 = FNABSDo
3807 { 899, 2, 1, 4, 131, 0, 0x18ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #899 = FNEGD
3808 { 900, 2, 1, 4, 246, 0, 0x18ULL, nullptr, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #900 = FNEGDo
3819 { 911, 2, 1, 4, 148, 0, 0x18ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #911 = FRE
3822 { 914, 2, 1, 4, 156, 0, 0x18ULL, nullptr, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #914 = FREo
3823 { 915, 2, 1, 4, 148, 0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #915 = FRIMD
3824 { 916, 2, 1, 4, 156, 0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #916 = FRIMDo
3827 { 919, 2, 1, 4, 148, 0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #919 = FRIND
3828 { 920, 2, 1, 4, 156, 0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #920 = FRINDo
3831 { 923, 2, 1, 4, 148, 0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #923 = FRIPD
3832 { 924, 2, 1, 4, 156, 0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #924 = FRIPDo
3835 { 927, 2, 1, 4, 148, 0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #927 = FRIZD
3836 { 928, 2, 1, 4, 156, 0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #928 = FRIZDo
3841 { 933, 2, 1, 4, 148, 0, 0x18ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #933 = FRSQRTE
3844 { 936, 2, 1, 4, 156, 0, 0x18ULL, nullptr, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #936 = FRSQRTEo
3849 { 941, 2, 1, 4, 262, 0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #941 = FSQRT
3852 { 944, 2, 1, 4, 265, 0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr }, // Inst #944 = FSQRTo
4016 { 1108, 2, 1, 4, 102, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #1108 = MFFSCDRN
4019 { 1111, 2, 1, 4, 102, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #1111 = MFFSCRN