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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/PowerPC/PPCGenInstrInfo.inc 3331 { 423, 0, 0, 4, 287, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr }, // Inst #423 = BDNZLR
3333 { 425, 0, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr }, // Inst #425 = BDNZLRL
3334 { 426, 0, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr }, // Inst #426 = BDNZLRLm
3335 { 427, 0, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr }, // Inst #427 = BDNZLRLp
3336 { 428, 0, 0, 4, 287, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr }, // Inst #428 = BDNZLRm
3337 { 429, 0, 0, 4, 287, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr }, // Inst #429 = BDNZLRp
3351 { 443, 0, 0, 4, 287, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr }, // Inst #443 = BDZLR
3353 { 445, 0, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr }, // Inst #445 = BDZLRL
3354 { 446, 0, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr }, // Inst #446 = BDZLRLm
3355 { 447, 0, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr }, // Inst #447 = BDZLRLp
3356 { 448, 0, 0, 4, 287, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr }, // Inst #448 = BDZLRm
3357 { 449, 0, 0, 4, 287, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr }, // Inst #449 = BDZLRp
5118 { 2210, 3, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, OperandInfo306, -1 ,nullptr }, // Inst #2210 = gBCCTR
5119 { 2211, 3, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList26, OperandInfo306, -1 ,nullptr }, // Inst #2211 = gBCCTRL
5123 { 2215, 3, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, OperandInfo306, -1 ,nullptr }, // Inst #2215 = gBCLR
5124 { 2216, 3, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList26, OperandInfo306, -1 ,nullptr }, // Inst #2216 = gBCLRL