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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/PowerPC/PPCGenInstrInfo.inc 3282 { 374, 2, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList12, OperandInfo69, -1 ,nullptr }, // Inst #374 = BCCCTRL
3284 { 376, 3, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo68, -1 ,nullptr }, // Inst #376 = BCCL
3285 { 377, 3, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo68, -1 ,nullptr }, // Inst #377 = BCCLA
3287 { 379, 2, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList15, ImplicitList12, OperandInfo69, -1 ,nullptr }, // Inst #379 = BCCLRL
3291 { 383, 1, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList12, OperandInfo70, -1 ,nullptr }, // Inst #383 = BCCTRL
3294 { 386, 1, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList12, OperandInfo70, -1 ,nullptr }, // Inst #386 = BCCTRLn
3309 { 401, 2, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo67, -1 ,nullptr }, // Inst #401 = BCL
3311 { 403, 1, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList15, ImplicitList12, OperandInfo70, -1 ,nullptr }, // Inst #403 = BCLRL
3312 { 404, 1, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList15, ImplicitList12, OperandInfo70, -1 ,nullptr }, // Inst #404 = BCLRLn
3314 { 406, 1, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo2, -1 ,nullptr }, // Inst #406 = BCLalways
3315 { 407, 2, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo67, -1 ,nullptr }, // Inst #407 = BCLn
3318 { 410, 0, 0, 4, 287, 0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList11, ImplicitList12, nullptr, -1 ,nullptr }, // Inst #410 = BCTRL
3362 { 454, 1, 0, 4, 287, 0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo76, -1 ,nullptr }, // Inst #454 = BL
3368 { 460, 1, 0, 4, 287, 0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo2, -1 ,nullptr }, // Inst #460 = BLA
3373 { 465, 0, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList15, ImplicitList12, nullptr, -1 ,nullptr }, // Inst #465 = BLRL
3374 { 466, 1, 0, 8, 287, 0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo76, -1 ,nullptr }, // Inst #466 = BL_NOP
3375 { 467, 2, 0, 4, 287, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo7, -1 ,nullptr }, // Inst #467 = BL_TLS
4023 { 1115, 1, 1, 4, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, ImplicitList12, nullptr, OperandInfo151, -1 ,nullptr }, // Inst #1115 = MFLR
4063 { 1155, 1, 0, 4, 226, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, nullptr, ImplicitList12, OperandInfo151, -1 ,nullptr }, // Inst #1155 = MTLR
4099 { 1191, 0, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, nullptr, ImplicitList12, nullptr, -1 ,nullptr }, // Inst #1191 = MoveGOTtoLR
4100 { 1192, 0, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, nullptr, ImplicitList12, nullptr, -1 ,nullptr }, // Inst #1192 = MovePCtoLR