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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/PowerPC/PPCGenInstrInfo.inc 3281 { 373, 2, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList10, nullptr, OperandInfo69, -1 ,nullptr }, // Inst #373 = BCCCTR8
3289 { 381, 1, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList10, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #381 = BCCTR8
3290 { 382, 1, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList10, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #382 = BCCTR8n
3317 { 409, 0, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList10, nullptr, nullptr, -1 ,nullptr }, // Inst #409 = BCTR8
3323 { 415, 1, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList10, ImplicitList10, OperandInfo2, -1 ,nullptr }, // Inst #415 = BDNZ8
3323 { 415, 1, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList10, ImplicitList10, OperandInfo2, -1 ,nullptr }, // Inst #415 = BDNZ8
3332 { 424, 0, 0, 4, 287, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList19, ImplicitList10, nullptr, -1 ,nullptr }, // Inst #424 = BDNZLR8
3343 { 435, 1, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList10, ImplicitList10, OperandInfo2, -1 ,nullptr }, // Inst #435 = BDZ8
3343 { 435, 1, 0, 4, 287, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList10, ImplicitList10, OperandInfo2, -1 ,nullptr }, // Inst #435 = BDZ8
3352 { 444, 0, 0, 4, 287, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList19, ImplicitList10, nullptr, -1 ,nullptr }, // Inst #444 = BDZLR8
3525 { 617, 2, 1, 4, 0, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList10, OperandInfo96, -1 ,nullptr }, // Inst #617 = EH_SjLj_SetJmp64
4013 { 1105, 1, 1, 4, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, ImplicitList10, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #1105 = MFCTR8
4052 { 1144, 1, 0, 4, 226, 0, 0x9ULL, nullptr, ImplicitList10, OperandInfo36, -1 ,nullptr }, // Inst #1144 = MTCTR8
4053 { 1145, 1, 0, 4, 226, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, nullptr, ImplicitList10, OperandInfo36, -1 ,nullptr }, // Inst #1145 = MTCTR8loop