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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/PowerPC/PPCGenAsmMatcher.inc 4627 { 796 /* beqlr */, PPC::BCCLR, Convert__imm_95_76__regCR0, AMFBS_None, { }, },
4628 { 796 /* beqlr */, PPC::BCCLR, Convert__imm_95_76__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4629 { 802 /* beqlr+ */, PPC::BCCLR, Convert__imm_95_79__regCR0, AMFBS_None, { }, },
4630 { 802 /* beqlr+ */, PPC::BCCLR, Convert__imm_95_79__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4631 { 809 /* beqlr- */, PPC::BCCLR, Convert__imm_95_78__regCR0, AMFBS_None, { }, },
4632 { 809 /* beqlr- */, PPC::BCCLR, Convert__imm_95_78__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4699 { 1092 /* bgelr */, PPC::BCCLR, Convert__imm_95_4__regCR0, AMFBS_None, { }, },
4700 { 1092 /* bgelr */, PPC::BCCLR, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4701 { 1098 /* bgelr+ */, PPC::BCCLR, Convert__imm_95_7__regCR0, AMFBS_None, { }, },
4702 { 1098 /* bgelr+ */, PPC::BCCLR, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4703 { 1105 /* bgelr- */, PPC::BCCLR, Convert__imm_95_6__regCR0, AMFBS_None, { }, },
4704 { 1105 /* bgelr- */, PPC::BCCLR, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4747 { 1252 /* bgtlr */, PPC::BCCLR, Convert__imm_95_44__regCR0, AMFBS_None, { }, },
4748 { 1252 /* bgtlr */, PPC::BCCLR, Convert__imm_95_44__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4749 { 1258 /* bgtlr+ */, PPC::BCCLR, Convert__imm_95_47__regCR0, AMFBS_None, { }, },
4750 { 1258 /* bgtlr+ */, PPC::BCCLR, Convert__imm_95_47__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4751 { 1265 /* bgtlr- */, PPC::BCCLR, Convert__imm_95_46__regCR0, AMFBS_None, { }, },
4752 { 1265 /* bgtlr- */, PPC::BCCLR, Convert__imm_95_46__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4798 { 1419 /* blelr */, PPC::BCCLR, Convert__imm_95_36__regCR0, AMFBS_None, { }, },
4799 { 1419 /* blelr */, PPC::BCCLR, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4800 { 1425 /* blelr+ */, PPC::BCCLR, Convert__imm_95_39__regCR0, AMFBS_None, { }, },
4801 { 1425 /* blelr+ */, PPC::BCCLR, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4802 { 1432 /* blelr- */, PPC::BCCLR, Convert__imm_95_38__regCR0, AMFBS_None, { }, },
4803 { 1432 /* blelr- */, PPC::BCCLR, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4848 { 1588 /* bltlr */, PPC::BCCLR, Convert__imm_95_12__regCR0, AMFBS_None, { }, },
4849 { 1588 /* bltlr */, PPC::BCCLR, Convert__imm_95_12__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4850 { 1594 /* bltlr+ */, PPC::BCCLR, Convert__imm_95_15__regCR0, AMFBS_None, { }, },
4851 { 1594 /* bltlr+ */, PPC::BCCLR, Convert__imm_95_15__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4852 { 1601 /* bltlr- */, PPC::BCCLR, Convert__imm_95_14__regCR0, AMFBS_None, { }, },
4853 { 1601 /* bltlr- */, PPC::BCCLR, Convert__imm_95_14__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4896 { 1748 /* bnelr */, PPC::BCCLR, Convert__imm_95_68__regCR0, AMFBS_None, { }, },
4897 { 1748 /* bnelr */, PPC::BCCLR, Convert__imm_95_68__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4898 { 1754 /* bnelr+ */, PPC::BCCLR, Convert__imm_95_71__regCR0, AMFBS_None, { }, },
4899 { 1754 /* bnelr+ */, PPC::BCCLR, Convert__imm_95_71__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4900 { 1761 /* bnelr- */, PPC::BCCLR, Convert__imm_95_70__regCR0, AMFBS_None, { }, },
4901 { 1761 /* bnelr- */, PPC::BCCLR, Convert__imm_95_70__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4944 { 1908 /* bnglr */, PPC::BCCLR, Convert__imm_95_36__regCR0, AMFBS_None, { }, },
4945 { 1908 /* bnglr */, PPC::BCCLR, Convert__imm_95_36__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4946 { 1914 /* bnglr+ */, PPC::BCCLR, Convert__imm_95_39__regCR0, AMFBS_None, { }, },
4947 { 1914 /* bnglr+ */, PPC::BCCLR, Convert__imm_95_39__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4948 { 1921 /* bnglr- */, PPC::BCCLR, Convert__imm_95_38__regCR0, AMFBS_None, { }, },
4949 { 1921 /* bnglr- */, PPC::BCCLR, Convert__imm_95_38__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4992 { 2068 /* bnllr */, PPC::BCCLR, Convert__imm_95_4__regCR0, AMFBS_None, { }, },
4993 { 2068 /* bnllr */, PPC::BCCLR, Convert__imm_95_4__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4994 { 2074 /* bnllr+ */, PPC::BCCLR, Convert__imm_95_7__regCR0, AMFBS_None, { }, },
4995 { 2074 /* bnllr+ */, PPC::BCCLR, Convert__imm_95_7__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
4996 { 2081 /* bnllr- */, PPC::BCCLR, Convert__imm_95_6__regCR0, AMFBS_None, { }, },
4997 { 2081 /* bnllr- */, PPC::BCCLR, Convert__imm_95_6__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
5040 { 2228 /* bnslr */, PPC::BCCLR, Convert__imm_95_100__regCR0, AMFBS_None, { }, },
5041 { 2228 /* bnslr */, PPC::BCCLR, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
5042 { 2234 /* bnslr+ */, PPC::BCCLR, Convert__imm_95_103__regCR0, AMFBS_None, { }, },
5043 { 2234 /* bnslr+ */, PPC::BCCLR, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
5044 { 2241 /* bnslr- */, PPC::BCCLR, Convert__imm_95_102__regCR0, AMFBS_None, { }, },
5045 { 2241 /* bnslr- */, PPC::BCCLR, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
5088 { 2388 /* bnulr */, PPC::BCCLR, Convert__imm_95_100__regCR0, AMFBS_None, { }, },
5089 { 2388 /* bnulr */, PPC::BCCLR, Convert__imm_95_100__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
5090 { 2394 /* bnulr+ */, PPC::BCCLR, Convert__imm_95_103__regCR0, AMFBS_None, { }, },
5091 { 2394 /* bnulr+ */, PPC::BCCLR, Convert__imm_95_103__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
5092 { 2401 /* bnulr- */, PPC::BCCLR, Convert__imm_95_102__regCR0, AMFBS_None, { }, },
5093 { 2401 /* bnulr- */, PPC::BCCLR, Convert__imm_95_102__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
5138 { 2561 /* bsolr */, PPC::BCCLR, Convert__imm_95_108__regCR0, AMFBS_None, { }, },
5139 { 2561 /* bsolr */, PPC::BCCLR, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
5140 { 2567 /* bsolr+ */, PPC::BCCLR, Convert__imm_95_111__regCR0, AMFBS_None, { }, },
5141 { 2567 /* bsolr+ */, PPC::BCCLR, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
5142 { 2574 /* bsolr- */, PPC::BCCLR, Convert__imm_95_110__regCR0, AMFBS_None, { }, },
5143 { 2574 /* bsolr- */, PPC::BCCLR, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
5210 { 2857 /* bunlr */, PPC::BCCLR, Convert__imm_95_108__regCR0, AMFBS_None, { }, },
5211 { 2857 /* bunlr */, PPC::BCCLR, Convert__imm_95_108__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
5212 { 2863 /* bunlr+ */, PPC::BCCLR, Convert__imm_95_111__regCR0, AMFBS_None, { }, },
5213 { 2863 /* bunlr+ */, PPC::BCCLR, Convert__imm_95_111__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
5214 { 2870 /* bunlr- */, PPC::BCCLR, Convert__imm_95_110__regCR0, AMFBS_None, { }, },
5215 { 2870 /* bunlr- */, PPC::BCCLR, Convert__imm_95_110__RegCRRC1_0, AMFBS_None, { MCK_RegCRRC }, },
gen/lib/Target/PowerPC/PPCGenAsmWriter.inc 8165 case PPC::BCCLR:
gen/lib/Target/PowerPC/PPCGenMCCodeEmitter.inc 3037 case PPC::BCCLR:
lib/Target/PowerPC/PPCAsmPrinter.cpp 1236 if (RetOpcode == PPC::BCCLR) {
lib/Target/PowerPC/PPCEarlyReturn.cpp 92 BuildMI(**PI, J, J->getDebugLoc(), TII->get(PPC::BCCLR))
lib/Target/PowerPC/PPCInstrInfo.cpp 1452 MI.setDesc(get(PPC::BCCLR));