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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/PowerPC/PPCGenAsmMatcher.inc 4474 { 14 /* addi */, PPC::ADDI, Convert__RegGPRC1_0__RegGPRCNoR01_1__S16Imm1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRCNoR0, MCK_S16Imm }, },
gen/lib/Target/PowerPC/PPCGenDAGISel.inc 4132 /* 9014*/ OPC_EmitNode1, TARGET_VAL(PPC::ADDI), 0,
4148 /* 9058*/ OPC_EmitNode1, TARGET_VAL(PPC::ADDI), 0,
4203 /* 9208*/ OPC_EmitNode1, TARGET_VAL(PPC::ADDI), 0,
4225 /* 9272*/ OPC_EmitNode1, TARGET_VAL(PPC::ADDI), 0,
7787 /* 18780*/ OPC_EmitNode1, TARGET_VAL(PPC::ADDI), 0,
7803 /* 18824*/ OPC_EmitNode1, TARGET_VAL(PPC::ADDI), 0,
7858 /* 18974*/ OPC_EmitNode1, TARGET_VAL(PPC::ADDI), 0,
7880 /* 19038*/ OPC_EmitNode1, TARGET_VAL(PPC::ADDI), 0,
21061 /* 52886*/ OPC_MorphNodeTo1, TARGET_VAL(PPC::ADDI), 0,
21134 /* 53022*/ OPC_EmitNode1, TARGET_VAL(PPC::ADDI), 0,
23893 /* 58206*/ OPC_MorphNodeTo1, TARGET_VAL(PPC::ADDI), 0,
gen/lib/Target/PowerPC/PPCGenFastISel.inc 3396 return fastEmitInst_ri(PPC::ADDI, &PPC::GPRCRegClass, Op0, Op0IsKill, imm1);
gen/lib/Target/PowerPC/PPCGenMCCodeEmitter.inc 2689 case PPC::ADDI:
lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp 778 TmpInst.setOpcode(PPC::ADDI);
lib/Target/PowerPC/PPCAsmPrinter.cpp 647 MCInstBuilder(PPC::ADDI).addReg(PICR).addReg(PICR).addExpr(DeltaLo));
1029 MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)
1074 MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)
1122 MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)
1528 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI)
lib/Target/PowerPC/PPCExpandISEL.cpp 459 TII->get(isISEL8(*MI) ? PPC::ADDI8 : PPC::ADDI))
lib/Target/PowerPC/PPCFastISel.cpp 1314 Opc = PPC::ADDI;
1331 Opc = PPC::ADDI;
2419 if (MachineInstOpcode == PPC::ADDI)
lib/Target/PowerPC/PPCFrameLowering.cpp 1229 BuildMI(MBB, MBBI, dl, TII.get(PPC::ADDI), BPReg)
1419 : PPC::ADDI );
2320 unsigned ADDIInstr = is64Bit ? PPC::ADDI8 : PPC::ADDI;
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 577 unsigned Opc = N->getValueType(0) == MVT::i32 ? PPC::ADDI : PPC::ADDI8;
4078 SDValue AD = SDValue(CurDAG->getMachineNode(PPC::ADDI, dl, MVT::i32, Op,
6453 case PPC::ADDI:
lib/Target/PowerPC/PPCInstrInfo.cpp 2375 Opc == PPC::ADDI || Opc == PPC::ADDI8 ||
2409 case PPC::ADDI:
2649 if (Opc != PPC::ADDI && Opc != PPC::ADDI8)
2869 case PPC::ADDI:
3030 III.ImmOpcode = Opc == PPC::ADD4 ? PPC::ADDI : PPC::ADDI8;
3490 if (Opc != PPC::ADDItocL && Opc != PPC::ADDI && Opc != PPC::ADDI8)
lib/Target/PowerPC/PPCMIPeephole.cpp 776 if (LiMI->getOpcode() == PPC::ADDI || LiMI->getOpcode() == PPC::ADDI8)
784 LiMI->setDesc(TII->get(LiMI->getOpcode() == PPC::LI ? PPC::ADDI
lib/Target/PowerPC/PPCMachineScheduler.cpp 26 return Inst.getOpcode() == PPC::ADDI || Inst.getOpcode() == PPC::ADDI8;
lib/Target/PowerPC/PPCRegisterInfo.cpp 92 ImmToIdxMap[PPC::ADDI] = PPC::ADD4;
537 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), Reg)
602 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), MI.getOperand(0).getReg())
1192 if ((OpC == PPC::ADDI || OpC == PPC::ADDI8) &&
1223 unsigned ADDriOpc = TM.isPPC64() ? PPC::ADDI8 : PPC::ADDI;