reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/PowerPC/PPCGenAsmMatcher.inc
 4468   { 0 /* add */, PPC::ADD4, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2, AMFBS_None, { MCK_RegGPRC, MCK_RegGPRC, MCK_RegGPRC }, },
gen/lib/Target/PowerPC/PPCGenDAGISel.inc
21144 /* 53046*/          OPC_MorphNodeTo1, TARGET_VAL(PPC::ADD4), 0,
gen/lib/Target/PowerPC/PPCGenFastISel.inc
 1747   return fastEmitInst_rr(PPC::ADD4, &PPC::GPRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/PowerPC/PPCGenInstrInfo.inc
12210   { PPC::ADD4o, PPC::ADD4 },
12375   { PPC::ADD4, PPC::ADD4o },
gen/lib/Target/PowerPC/PPCGenMCCodeEmitter.inc
 4730     case PPC::ADD4:
lib/Target/PowerPC/PPCAsmPrinter.cpp
  669       TmpInst.setOpcode(PPC::ADD4);
  977     EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4)
lib/Target/PowerPC/PPCFastISel.cpp
 1290       Opc = IsGPRC ? PPC::ADD4 : PPC::ADD8;
 1313         case PPC::ADD4:
lib/Target/PowerPC/PPCFrameLowering.cpp
 1421                                                 : PPC::ADD4 );
 2321       unsigned ADDInstr = is64Bit ? PPC::ADD8 : PPC::ADD4;
lib/Target/PowerPC/PPCISelLowering.cpp
10504     BuildMI(BB, dl, TII->get(is64bit ? PPC::ADD8 : PPC::ADD4), Ptr1Reg)
11045     BB = EmitPartwordAtomicBinary(MI, BB, true, PPC::ADD4);
11047     BB = EmitPartwordAtomicBinary(MI, BB, false, PPC::ADD4);
11049     BB = EmitAtomicBinary(MI, BB, 4, PPC::ADD4);
11328       BuildMI(BB, dl, TII->get(is64bit ? PPC::ADD8 : PPC::ADD4), Ptr1Reg)
lib/Target/PowerPC/PPCInstrInfo.cpp
 2661   return Opc == PPC::ADD4 || Opc == PPC::ADD8;
 3023   case PPC::ADD4:
 3030     III.ImmOpcode = Opc == PPC::ADD4 ? PPC::ADDI : PPC::ADDI8;
lib/Target/PowerPC/PPCMIPeephole.cpp
  719       case PPC::ADD4:
lib/Target/PowerPC/PPCRegisterInfo.cpp
   92   ImmToIdxMap[PPC::ADDI] = PPC::ADD4;