|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/NVPTX/NVPTXGenInstrInfo.inc 6906 { 275, 3, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #275 = CVT_s16_s16
6909 { 278, 3, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #278 = CVT_s16_s8
6910 { 279, 3, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #279 = CVT_s16_u16
6913 { 282, 3, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #282 = CVT_s16_u8
6939 { 308, 3, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #308 = CVT_s8_s16
6942 { 311, 3, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #311 = CVT_s8_s8
6943 { 312, 3, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #312 = CVT_s8_u16
6946 { 315, 3, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #315 = CVT_s8_u8
6950 { 319, 3, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #319 = CVT_u16_s16
6953 { 322, 3, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #322 = CVT_u16_s8
6954 { 323, 3, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #323 = CVT_u16_u16
6957 { 326, 3, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #326 = CVT_u16_u8
6983 { 352, 3, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #352 = CVT_u8_s16
6986 { 355, 3, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #355 = CVT_u8_s8
6987 { 356, 3, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #356 = CVT_u8_u16
6990 { 359, 3, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #359 = CVT_u8_u8
7836 { 1205, 3, 2, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #1205 = INT_PTX_LDG_G_v2i16_ELE_avar
7851 { 1220, 3, 2, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #1220 = INT_PTX_LDG_G_v2i8_ELE_avar
7956 { 1325, 3, 2, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #1325 = INT_PTX_LDU_G_v2i16_ELE_avar
7971 { 1340, 3, 2, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #1340 = INT_PTX_LDU_G_v2i8_ELE_avar