|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/NVPTX/NVPTXGenInstrInfo.inc 9171 { 2540, 7, 4, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1080ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #2540 = TEX_UNIFIED_1D_S32_F32_LEVEL
9175 { 2544, 7, 4, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1080ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #2544 = TEX_UNIFIED_1D_U32_F32_LEVEL
9193 { 2562, 7, 4, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1080ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #2562 = TEX_UNIFIED_2D_S32_F32
9197 { 2566, 7, 4, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1080ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #2566 = TEX_UNIFIED_2D_U32_F32
9238 { 2607, 7, 4, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1080ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #2607 = TLD4_UNIFIED_A_2D_S32_F32
9239 { 2608, 7, 4, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1080ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #2608 = TLD4_UNIFIED_A_2D_U32_F32
9241 { 2610, 7, 4, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1080ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #2610 = TLD4_UNIFIED_B_2D_S32_F32
9242 { 2611, 7, 4, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1080ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #2611 = TLD4_UNIFIED_B_2D_U32_F32
9244 { 2613, 7, 4, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1080ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #2613 = TLD4_UNIFIED_G_2D_S32_F32
9245 { 2614, 7, 4, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1080ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #2614 = TLD4_UNIFIED_G_2D_U32_F32
9247 { 2616, 7, 4, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1080ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #2616 = TLD4_UNIFIED_R_2D_S32_F32
9248 { 2617, 7, 4, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x1080ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #2617 = TLD4_UNIFIED_R_2D_U32_F32