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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Mips/MipsGenAsmWriter.inc 9084 MRI.getRegClass(Mips::COP0RegClassID).contains(MI->getOperand(1).getReg()) &&
9134 MRI.getRegClass(Mips::COP0RegClassID).contains(MI->getOperand(0).getReg()) &&
gen/lib/Target/Mips/MipsGenInstrInfo.inc 4571 static const MCOperandInfo OperandInfo109[] = { { Mips::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Mips::COP0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4579 static const MCOperandInfo OperandInfo117[] = { { Mips::COP0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Mips::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4682 static const MCOperandInfo OperandInfo220[] = { { Mips::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Mips::COP0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4685 static const MCOperandInfo OperandInfo223[] = { { Mips::COP0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Mips::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
gen/lib/Target/Mips/MipsGenRegisterInfo.inc 2676 { COP0, COP0Bits, 0, 32, sizeof(COP0Bits), Mips::COP0RegClassID, 1, false },
4820 &MipsMCRegisterClasses[COP0RegClassID],
lib/Target/Mips/AsmParser/MipsAsmParser.cpp 947 unsigned ClassID = Mips::COP0RegClassID;
lib/Target/Mips/Disassembler/MipsDisassembler.cpp 2181 unsigned Reg = getReg(Decoder, Mips::COP0RegClassID, RegNo);
lib/Target/Mips/MipsOptionRecord.h 53 COP0RegClass = &(TRI->getRegClass(Mips::COP0RegClassID));