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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Mips/MipsGenAsmMatcher.inc 7772 { 8678 /* srl */, Mips::SRLV, Convert__GPR32AsmReg1_0__GPR32AsmReg1_0__GPR32AsmReg1_1, AMFBS_NotInMicroMips, { MCK_GPR32AsmReg, MCK_GPR32AsmReg }, },
7778 { 8678 /* srl */, Mips::SRLV, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__GPR32AsmReg1_2, AMFBS_NotInMicroMips, { MCK_GPR32AsmReg, MCK_GPR32AsmReg, MCK_GPR32AsmReg }, },
7801 { 8800 /* srlv */, Mips::SRLV, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__GPR32AsmReg1_2, AMFBS_HasStdEnc_NotInMicroMips, { MCK_GPR32AsmReg, MCK_GPR32AsmReg, MCK_GPR32AsmReg }, },
gen/lib/Target/Mips/MipsGenDAGISel.inc16218 /* 29982*/ OPC_EmitNode1, TARGET_VAL(Mips::SRLV), 0,
20208 /* 37744*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::SRLV), 0,
gen/lib/Target/Mips/MipsGenFastISel.inc 2319 return fastEmitInst_rr(Mips::SRLV, &Mips::GPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/Mips/MipsGenGlobalISel.inc12520 GIR_BuildMI, /*InsnID*/2, /*Opcode*/Mips::SRLV,
13205 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/Mips::SRLV,
gen/lib/Target/Mips/MipsGenInstrInfo.inc16698 { Mips::SRLV, Mips::SRLV, Mips::SRLV_MM },
16698 { Mips::SRLV, Mips::SRLV, Mips::SRLV_MM },
gen/lib/Target/Mips/MipsGenMCCodeEmitter.inc 5235 case Mips::SRLV: {
lib/Target/Mips/AsmParser/MipsAsmParser.cpp 4665 FirstShift = Mips::SRLV;
4670 SecondShift = Mips::SRLV;
lib/Target/Mips/MipsExpandPseudo.cpp 175 BuildMI(sinkMBB, DL, TII->get(Mips::SRLV), Dest)
456 BuildMI(sinkMBB, DL, TII->get(Mips::SRLV), Dest)
lib/Target/Mips/MipsFastISel.cpp 2028 Opcode = Mips::SRLV;