reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/Mips/MipsGenAsmMatcher.inc
 7774   { 8678 /* srl */, Mips::SRL, Convert__GPR32AsmReg1_0__GPR32AsmReg1_0__ConstantUImm5_01_1, AMFBS_HasStdEnc_NotInMicroMips, { MCK_GPR32AsmReg, MCK_ConstantUImm5_0 }, },
 7780   { 8678 /* srl */, Mips::SRL, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__ConstantUImm5_01_2, AMFBS_HasStdEnc_NotInMicroMips, { MCK_GPR32AsmReg, MCK_GPR32AsmReg, MCK_ConstantUImm5_0 }, },
gen/lib/Target/Mips/MipsGenDAGISel.inc
16205 /* 29950*/          OPC_EmitNode1, TARGET_VAL(Mips::SRL), 0,
20142 /* 37620*/        OPC_MorphNodeTo1, TARGET_VAL(Mips::SRL), 0,
21937 /* 41045*/        OPC_MorphNodeTo1, TARGET_VAL(Mips::SRL), 0,
21963 /* 41119*/        OPC_MorphNodeTo1, TARGET_VAL(Mips::SRL), 0,
22002 /* 41204*/        OPC_MorphNodeTo1, TARGET_VAL(Mips::SRL), 0,
22028 /* 41278*/        OPC_MorphNodeTo1, TARGET_VAL(Mips::SRL), 0,
gen/lib/Target/Mips/MipsGenFastISel.inc
 3687     return fastEmitInst_ri(Mips::SRL, &Mips::GPR32RegClass, Op0, Op0IsKill, imm1);
gen/lib/Target/Mips/MipsGenGlobalISel.inc
12391         GIR_BuildMI, /*InsnID*/2, /*Opcode*/Mips::SRL,
13130         GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::SRL,
gen/lib/Target/Mips/MipsGenInstrInfo.inc
16697   { Mips::SRL, Mips::SRL, Mips::SRL_MM },
16697   { Mips::SRL, Mips::SRL, Mips::SRL_MM },
gen/lib/Target/Mips/MipsGenMCCodeEmitter.inc
 5303     case Mips::SRL: {
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
 4314     TOut.emitRRI(Mips::SRL, DstReg, DstReg, 8, IDLoc, STI);
 4321     TOut.emitRRI(Mips::SRL, ATReg, DstReg, 8, IDLoc, STI);
 4721       TOut.emitRRI(Mips::SRL, DReg, SReg, 0, Inst.getLoc(), STI);
 4730       SecondShift = Mips::SRL;
 4733       FirstShift = Mips::SRL;
lib/Target/Mips/MipsFastISel.cpp
 1619         emitInst(Mips::SRL, TempReg[1]).addReg(SrcReg).addImm(8);
 1640         emitInst(Mips::SRL, TempReg[0]).addReg(SrcReg).addImm(8);
 1641         emitInst(Mips::SRL, TempReg[1]).addReg(SrcReg).addImm(24);
 2005       Opcode = Mips::SRL;