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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Mips/MipsGenAsmMatcher.inc 7588 { 8065 /* sgt */, Mips::SLT_MM, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__GPR32AsmReg1_0, AMFBS_InMicroMips, { MCK_GPR32AsmReg, MCK_GPR32AsmReg }, },
7592 { 8065 /* sgt */, Mips::SLT_MM, Convert__GPR32AsmReg1_0__GPR32AsmReg1_2__GPR32AsmReg1_1, AMFBS_InMicroMips, { MCK_GPR32AsmReg, MCK_GPR32AsmReg, MCK_GPR32AsmReg }, },
7704 { 8446 /* slt */, Mips::SLT_MM, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__GPR32AsmReg1_2, AMFBS_InMicroMips, { MCK_GPR32AsmReg, MCK_GPR32AsmReg, MCK_GPR32AsmReg }, },
gen/lib/Target/Mips/MipsGenDAGISel.inc 2408 /* 4299*/ OPC_EmitNode1, TARGET_VAL(Mips::SLT_MM), 0,
2442 /* 4367*/ OPC_EmitNode1, TARGET_VAL(Mips::SLT_MM), 0,
2476 /* 4435*/ OPC_EmitNode1, TARGET_VAL(Mips::SLT_MM), 0,
2508 /* 4495*/ OPC_EmitNode1, TARGET_VAL(Mips::SLT_MM), 0,
4729 /* 9031*/ OPC_EmitNode1, TARGET_VAL(Mips::SLT_MM), 0,
4755 /* 9085*/ OPC_EmitNode1, TARGET_VAL(Mips::SLT_MM), 0,
4807 /* 9193*/ OPC_EmitNode1, TARGET_VAL(Mips::SLT_MM), 0,
4833 /* 9247*/ OPC_EmitNode1, TARGET_VAL(Mips::SLT_MM), 0,
5963 /* 11540*/ OPC_EmitNode1, TARGET_VAL(Mips::SLT_MM), 0,
5991 /* 11598*/ OPC_EmitNode1, TARGET_VAL(Mips::SLT_MM), 0,
6047 /* 11714*/ OPC_EmitNode1, TARGET_VAL(Mips::SLT_MM), 0,
6075 /* 11772*/ OPC_EmitNode1, TARGET_VAL(Mips::SLT_MM), 0,
16682 /* 30992*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::SLT_MM), 0,
16698 /* 31022*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::SLT_MM), 0,
16802 /* 31260*/ OPC_EmitNode1, TARGET_VAL(Mips::SLT_MM), 0,
16824 /* 31312*/ OPC_EmitNode1, TARGET_VAL(Mips::SLT_MM), 0,
gen/lib/Target/Mips/MipsGenGlobalISel.inc13846 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::SLT_MM,
14499 GIR_BuildMI, /*InsnID*/1, /*Opcode*/Mips::SLT_MM,
14544 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::SLT_MM,
14579 GIR_BuildMI, /*InsnID*/1, /*Opcode*/Mips::SLT_MM,
16907 GIR_BuildMI, /*InsnID*/1, /*Opcode*/Mips::SLT_MM,
16975 GIR_BuildMI, /*InsnID*/1, /*Opcode*/Mips::SLT_MM,
17111 GIR_BuildMI, /*InsnID*/1, /*Opcode*/Mips::SLT_MM,
17179 GIR_BuildMI, /*InsnID*/1, /*Opcode*/Mips::SLT_MM,
17315 GIR_BuildMI, /*InsnID*/1, /*Opcode*/Mips::SLT_MM,
17383 GIR_BuildMI, /*InsnID*/1, /*Opcode*/Mips::SLT_MM,
19163 GIR_BuildMI, /*InsnID*/1, /*Opcode*/Mips::SLT_MM,
19231 GIR_BuildMI, /*InsnID*/1, /*Opcode*/Mips::SLT_MM,
gen/lib/Target/Mips/MipsGenInstrInfo.inc16691 { Mips::SLT, Mips::SLT, Mips::SLT_MM },
gen/lib/Target/Mips/MipsGenMCCodeEmitter.inc 7908 case Mips::SLT_MM:
lib/Target/Mips/AsmParser/MipsAsmParser.cpp 4590 FinalOpcode = Mips::SLT_MM;