reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/Mips/MipsGenInstrInfo.inc
 5185   { 370,	2,	1,	4,	1,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo97, -1 ,nullptr },  // Inst #370 = LONG_BRANCH_LUi2Op
 5581   { 766,	2,	0,	4,	919,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x36ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #766 = BEQZALC
 5582   { 767,	2,	0,	4,	992,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #767 = BEQZALC_MMR6
 5583   { 768,	2,	0,	4,	924,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x36ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #768 = BEQZC
 5586   { 771,	2,	0,	4,	942,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #771 = BEQZC_MM
 5587   { 772,	2,	0,	4,	979,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x36ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #772 = BEQZC_MMR6
 5595   { 780,	2,	0,	4,	913,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x12ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #780 = BGEZ
 5597   { 782,	2,	0,	4,	917,	0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x12ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #782 = BGEZAL
 5598   { 783,	2,	0,	4,	919,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x36ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #783 = BGEZALC
 5599   { 784,	2,	0,	4,	992,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #784 = BGEZALC_MMR6
 5600   { 785,	2,	0,	4,	371,	0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x12ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #785 = BGEZALL
 5601   { 786,	2,	0,	4,	949,	0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #786 = BGEZALS_MM
 5602   { 787,	2,	0,	4,	950,	0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x12ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #787 = BGEZAL_MM
 5603   { 788,	2,	0,	4,	924,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x36ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #788 = BGEZC
 5605   { 790,	2,	0,	4,	979,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #790 = BGEZC_MMR6
 5606   { 791,	2,	0,	4,	373,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x12ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #791 = BGEZL
 5607   { 792,	2,	0,	4,	941,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x12ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #792 = BGEZ_MM
 5608   { 793,	2,	0,	4,	913,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x12ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #793 = BGTZ
 5610   { 795,	2,	0,	4,	919,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x36ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #795 = BGTZALC
 5611   { 796,	2,	0,	4,	992,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #796 = BGTZALC_MMR6
 5612   { 797,	2,	0,	4,	924,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x36ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #797 = BGTZC
 5614   { 799,	2,	0,	4,	979,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #799 = BGTZC_MMR6
 5615   { 800,	2,	0,	4,	373,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x12ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #800 = BGTZL
 5616   { 801,	2,	0,	4,	941,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x12ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #801 = BGTZ_MM
 5637   { 822,	2,	0,	4,	913,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x12ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #822 = BLEZ
 5639   { 824,	2,	0,	4,	919,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x36ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #824 = BLEZALC
 5640   { 825,	2,	0,	4,	992,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #825 = BLEZALC_MMR6
 5641   { 826,	2,	0,	4,	924,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x36ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #826 = BLEZC
 5643   { 828,	2,	0,	4,	979,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #828 = BLEZC_MMR6
 5644   { 829,	2,	0,	4,	373,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x12ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #829 = BLEZL
 5645   { 830,	2,	0,	4,	941,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x12ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #830 = BLEZ_MM
 5652   { 837,	2,	0,	4,	913,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x12ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #837 = BLTZ
 5654   { 839,	2,	0,	4,	911,	0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x12ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #839 = BLTZAL
 5655   { 840,	2,	0,	4,	919,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x36ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #840 = BLTZALC
 5656   { 841,	2,	0,	4,	992,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #841 = BLTZALC_MMR6
 5657   { 842,	2,	0,	4,	371,	0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x12ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #842 = BLTZALL
 5658   { 843,	2,	0,	4,	949,	0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #843 = BLTZALS_MM
 5659   { 844,	2,	0,	4,	950,	0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x12ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #844 = BLTZAL_MM
 5660   { 845,	2,	0,	4,	924,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x36ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #845 = BLTZC
 5662   { 847,	2,	0,	4,	979,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #847 = BLTZC_MMR6
 5663   { 848,	2,	0,	4,	373,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x12ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #848 = BLTZL
 5664   { 849,	2,	0,	4,	941,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Terminator), 0x12ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #849 = BLTZ_MM
 5684   { 869,	2,	0,	4,	919,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x36ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #869 = BNEZALC
 5685   { 870,	2,	0,	4,	992,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, ImplicitList3, OperandInfo97, -1 ,nullptr },  // Inst #870 = BNEZALC_MMR6
 5686   { 871,	2,	0,	4,	924,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x36ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #871 = BNEZC
 5689   { 874,	2,	0,	4,	942,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #874 = BNEZC_MM
 5690   { 875,	2,	0,	4,	979,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x36ULL, nullptr, ImplicitList2, OperandInfo97, -1 ,nullptr },  // Inst #875 = BNEZC_MMR6