|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/Mips/MipsGenInstrInfo.inc 5128 { 313, 3, 0, 4, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #313 = DMULMacro
5129 { 314, 3, 0, 4, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #314 = DMULOMacro
5130 { 315, 3, 0, 4, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #315 = DMULOUMacro
5136 { 321, 3, 1, 4, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #321 = DSDivMacro
5138 { 323, 3, 1, 4, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #323 = DSRemMacro
5140 { 325, 3, 1, 4, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #325 = DUDivMacro
5142 { 327, 3, 1, 4, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #327 = DURemMacro
5488 { 673, 3, 1, 4, 798, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::Rematerializable), 0x1ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #673 = AND64
5539 { 724, 3, 1, 4, 1190, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::Rematerializable), 0x1ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #724 = BADDu
6053 { 1238, 3, 1, 4, 808, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #1238 = DADD
6056 { 1241, 3, 1, 4, 811, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::Rematerializable), 0x1ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #1241 = DADDu
6066 { 1251, 3, 1, 4, 907, 0|(1ULL<<MCID::UsesCustomInserter), 0x6ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #1251 = DDIV
6067 { 1252, 3, 1, 4, 909, 0|(1ULL<<MCID::UsesCustomInserter), 0x6ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #1252 = DDIVU
6100 { 1285, 3, 1, 4, 908, 0|(1ULL<<MCID::UsesCustomInserter), 0x6ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #1285 = DMOD
6101 { 1286, 3, 1, 4, 910, 0|(1ULL<<MCID::UsesCustomInserter), 0x6ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #1286 = DMODU
6108 { 1293, 3, 1, 4, 904, 0, 0x6ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #1293 = DMUH
6109 { 1294, 3, 1, 4, 905, 0, 0x6ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #1294 = DMUHU
6110 { 1295, 3, 1, 4, 1201, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::Rematerializable), 0x1ULL, nullptr, ImplicitList11, OperandInfo62, -1 ,nullptr }, // Inst #1295 = DMUL
6113 { 1298, 3, 1, 4, 893, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #1298 = DMULU
6114 { 1299, 3, 1, 4, 906, 0, 0x6ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #1299 = DMUL_R6
6182 { 1367, 3, 1, 4, 830, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #1367 = DSUB
6183 { 1368, 3, 1, 4, 831, 0|(1ULL<<MCID::Rematerializable), 0x1ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #1368 = DSUBu
6943 { 2128, 3, 1, 4, 834, 0|(1ULL<<MCID::Commutable), 0x1ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #2128 = NOR64
6955 { 2140, 3, 1, 4, 835, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::Rematerializable), 0x1ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #2140 = OR64
7136 { 2321, 3, 1, 4, 844, 0, 0x6ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #2321 = SELEQZ64
7143 { 2328, 3, 1, 4, 844, 0, 0x6ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #2328 = SELNEZ64
7153 { 2338, 3, 1, 4, 1198, 0, 0x1ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #2338 = SEQ
7253 { 2438, 3, 1, 4, 1198, 0, 0x1ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #2438 = SNE
7497 { 2682, 3, 1, 4, 1200, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, ImplicitList33, OperandInfo62, -1 ,nullptr }, // Inst #2682 = V3MULU
7498 { 2683, 3, 1, 4, 1200, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, ImplicitList25, OperandInfo62, -1 ,nullptr }, // Inst #2683 = VMM0
7499 { 2684, 3, 1, 4, 1200, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, ImplicitList34, OperandInfo62, -1 ,nullptr }, // Inst #2684 = VMULU
7516 { 2701, 3, 1, 4, 807, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::Rematerializable), 0x1ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #2701 = XOR64