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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Mips/MipsGenInstrInfo.inc 4992 { 177, 3, 1, 4, 545, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #177 = AND_V_D_PSEUDO
5232 { 417, 3, 1, 4, 545, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #417 = NOR_V_D_PSEUDO
5235 { 420, 3, 1, 4, 545, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #420 = OR_V_D_PSEUDO
5398 { 583, 3, 1, 4, 545, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #583 = XOR_V_D_PSEUDO
5433 { 618, 3, 1, 4, 534, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #618 = ADDS_A_D
5437 { 622, 3, 1, 4, 534, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #622 = ADDS_S_D
5441 { 626, 3, 1, 4, 534, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #626 = ADDS_U_D
5464 { 649, 3, 1, 4, 535, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #649 = ADDV_D
5470 { 655, 3, 1, 4, 533, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #655 = ADD_A_D
5502 { 687, 3, 1, 4, 536, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #687 = ASUB_S_D
5506 { 691, 3, 1, 4, 536, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #691 = ASUB_U_D
5514 { 699, 3, 1, 4, 537, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #699 = AVER_S_D
5518 { 703, 3, 1, 4, 537, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #703 = AVER_U_D
5522 { 707, 3, 1, 4, 537, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #707 = AVE_S_D
5526 { 711, 3, 1, 4, 537, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #711 = AVE_U_D
5570 { 755, 3, 1, 4, 516, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #755 = BCLR_D
5679 { 864, 3, 1, 4, 517, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #864 = BNEG_D
5716 { 901, 3, 1, 4, 515, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #901 = BSET_D
5757 { 942, 3, 1, 4, 551, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #942 = CEQ_D
5781 { 966, 3, 1, 4, 550, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #966 = CLE_S_D
5785 { 970, 3, 1, 4, 550, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #970 = CLE_U_D
5801 { 986, 3, 1, 4, 549, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #986 = CLT_S_D
5805 { 990, 3, 1, 4, 549, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #990 = CLT_U_D
6084 { 1269, 3, 1, 4, 609, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1269 = DIV_S_D
6088 { 1273, 3, 1, 4, 609, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1273 = DIV_U_D
6240 { 1425, 3, 1, 4, 655, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1425 = FADD_D
6249 { 1434, 3, 1, 4, 572, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1434 = FCAF_D
6251 { 1436, 3, 1, 4, 573, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1436 = FCEQ_D
6255 { 1440, 3, 1, 4, 574, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1440 = FCLE_D
6257 { 1442, 3, 1, 4, 575, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1442 = FCLT_D
6264 { 1449, 3, 1, 4, 576, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1449 = FCNE_D
6266 { 1451, 3, 1, 4, 577, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1451 = FCOR_D
6268 { 1453, 3, 1, 4, 578, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1453 = FCUEQ_D
6270 { 1455, 3, 1, 4, 579, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1455 = FCULE_D
6272 { 1457, 3, 1, 4, 580, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1457 = FCULT_D
6274 { 1459, 3, 1, 4, 581, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1459 = FCUNE_D
6276 { 1461, 3, 1, 4, 582, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1461 = FCUN_D
6278 { 1463, 3, 1, 4, 651, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1463 = FDIV_D
6289 { 1474, 3, 1, 4, 548, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1474 = FEXP2_D
6322 { 1507, 3, 1, 4, 595, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1507 = FMAX_A_D
6324 { 1509, 3, 1, 4, 596, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1509 = FMAX_D
6326 { 1511, 3, 1, 4, 597, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1511 = FMIN_A_D
6328 { 1513, 3, 1, 4, 598, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1513 = FMIN_D
6340 { 1525, 3, 1, 4, 654, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1525 = FMUL_D
6363 { 1548, 3, 1, 4, 566, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1548 = FSAF_D
6365 { 1550, 3, 1, 4, 566, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1550 = FSEQ_D
6367 { 1552, 3, 1, 4, 566, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1552 = FSLE_D
6369 { 1554, 3, 1, 4, 566, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1554 = FSLT_D
6371 { 1556, 3, 1, 4, 566, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1556 = FSNE_D
6373 { 1558, 3, 1, 4, 566, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1558 = FSOR_D
6383 { 1568, 3, 1, 4, 656, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1568 = FSUB_D
6392 { 1577, 3, 1, 4, 567, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1577 = FSUEQ_D
6394 { 1579, 3, 1, 4, 568, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1579 = FSULE_D
6396 { 1581, 3, 1, 4, 569, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1581 = FSULT_D
6398 { 1583, 3, 1, 4, 570, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1583 = FSUNE_D
6400 { 1585, 3, 1, 4, 571, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1585 = FSUN_D
6431 { 1616, 3, 1, 4, 601, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1616 = ILVEV_D
6435 { 1620, 3, 1, 4, 600, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1620 = ILVL_D
6439 { 1624, 3, 1, 4, 601, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1624 = ILVOD_D
6443 { 1628, 3, 1, 4, 600, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1628 = ILVR_D
6674 { 1859, 3, 1, 4, 614, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1859 = MAX_A_D
6681 { 1866, 3, 1, 4, 612, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1866 = MAX_S_D
6686 { 1871, 3, 1, 4, 613, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1871 = MAX_U_D
6733 { 1918, 3, 1, 4, 614, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1918 = MIN_A_D
6740 { 1925, 3, 1, 4, 612, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1925 = MIN_S_D
6745 { 1930, 3, 1, 4, 613, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1930 = MIN_U_D
6755 { 1940, 3, 1, 4, 608, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1940 = MOD_S_D
6759 { 1944, 3, 1, 4, 608, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1944 = MOD_U_D
6908 { 2093, 3, 1, 4, 662, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2093 = MULV_D
6971 { 2156, 3, 1, 4, 621, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2156 = PCKEV_D
6975 { 2160, 3, 1, 4, 621, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2160 = PCKOD_D
7236 { 2421, 3, 1, 4, 620, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2421 = SLL_D
7273 { 2458, 3, 1, 4, 618, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2458 = SRAR_D
7279 { 2464, 3, 1, 4, 616, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2464 = SRA_D
7295 { 2480, 3, 1, 4, 619, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2480 = SRLR_D
7301 { 2486, 3, 1, 4, 617, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2486 = SRL_D
7328 { 2513, 3, 1, 4, 604, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2513 = SUBSUS_U_D
7332 { 2517, 3, 1, 4, 605, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2517 = SUBSUU_S_D
7336 { 2521, 3, 1, 4, 603, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2521 = SUBS_S_D
7340 { 2525, 3, 1, 4, 603, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2525 = SUBS_U_D
7363 { 2548, 3, 1, 4, 607, 0, 0x6ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2548 = SUBV_D