reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/Mips/MipsGenInstrInfo.inc
 4989   { 174,	2,	1,	4,	1,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #174 = ABSMacro
 5173   { 358,	2,	1,	4,	1,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #358 = JalTwoReg
 5208   { 393,	2,	0,	4,	1,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x10ULL, ImplicitList5, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #393 = MIPSeh_return32
 5218   { 403,	2,	1,	4,	1,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #403 = MTTGPR
 5405   { 590,	2,	1,	4,	1346,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, ImplicitList8, OperandInfo36, -1 ,nullptr },  // Inst #590 = ABSQ_S_W
 5406   { 591,	2,	1,	4,	1497,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, ImplicitList8, OperandInfo36, -1 ,nullptr },  // Inst #591 = ABSQ_S_W_MM
 5633   { 818,	2,	1,	4,	1354,	0, 0x6ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #818 = BITREV
 5634   { 819,	2,	1,	4,	1505,	0, 0x6ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #819 = BITREV_MM
 5635   { 820,	2,	1,	4,	722,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #820 = BITSWAP
 5636   { 821,	2,	1,	4,	776,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #821 = BITSWAP_MMR6
 5788   { 973,	2,	1,	4,	469,	0, 0x1ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #973 = CLO
 5789   { 974,	2,	1,	4,	736,	0, 0x1ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #974 = CLO_MM
 5790   { 975,	2,	1,	4,	777,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #975 = CLO_MMR6
 5791   { 976,	2,	1,	4,	723,	0, 0x6ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #976 = CLO_R6
 5808   { 993,	2,	1,	4,	470,	0, 0x1ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #993 = CLZ
 5809   { 994,	2,	1,	4,	737,	0, 0x1ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #994 = CLZ_MM
 5810   { 995,	2,	1,	4,	778,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #995 = CLZ_MMR6
 5811   { 996,	2,	1,	4,	724,	0, 0x6ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #996 = CLZ_R6
 6461   { 1646,	2,	1,	4,	402,	0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x11ULL, nullptr, ImplicitList3, OperandInfo36, -1 ,nullptr },  // Inst #1646 = JALR
 6465   { 1650,	2,	1,	4,	994,	0|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::UnmodeledSideEffects), 0x3ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1650 = JALRC_HB_MMR6
 6466   { 1651,	2,	1,	4,	995,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, ImplicitList3, OperandInfo36, -1 ,nullptr },  // Inst #1651 = JALRC_MMR6
 6468   { 1653,	2,	1,	4,	952,	0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, ImplicitList3, OperandInfo36, -1 ,nullptr },  // Inst #1653 = JALRS_MM
 6469   { 1654,	2,	1,	4,	403,	0|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::UnmodeledSideEffects), 0x13ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1654 = JALR_HB
 6471   { 1656,	2,	1,	4,	951,	0|(1ULL<<MCID::DelaySlot)|(1ULL<<MCID::Call)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::UnmodeledSideEffects), 0x11ULL, nullptr, ImplicitList3, OperandInfo36, -1 ,nullptr },  // Inst #1656 = JALR_MM
 6628   { 1813,	2,	0,	4,	845,	0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList6, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #1813 = MADD
 6635   { 1820,	2,	0,	4,	846,	0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList6, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #1820 = MADDU
 6638   { 1823,	2,	0,	4,	873,	0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList6, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #1823 = MADDU_MM
 6648   { 1833,	2,	0,	4,	872,	0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList6, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #1833 = MADD_MM
 6762   { 1947,	2,	1,	2,	742,	0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1947 = MOVE16_MM
 6763   { 1948,	2,	1,	2,	784,	0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1948 = MOVE16_MMR6
 6807   { 1992,	2,	0,	4,	847,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList6, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #1992 = MSUB
 6814   { 1999,	2,	0,	4,	848,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList6, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #1999 = MSUBU
 6817   { 2002,	2,	0,	4,	875,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList6, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #2002 = MSUBU_MM
 6827   { 2012,	2,	0,	4,	874,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList6, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #2012 = MSUB_MM
 6897   { 2082,	2,	0,	4,	482,	0|(1ULL<<MCID::Commutable), 0x1ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #2082 = MULT
 6902   { 2087,	2,	0,	4,	870,	0|(1ULL<<MCID::Commutable), 0x1ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #2087 = MULT_MM
 6903   { 2088,	2,	0,	4,	483,	0|(1ULL<<MCID::Commutable), 0x1ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #2088 = MULTu
 6904   { 2089,	2,	0,	4,	871,	0|(1ULL<<MCID::Commutable), 0x1ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #2089 = MULTu_MM
 6988   { 2173,	2,	1,	4,	1195,	0, 0x1ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #2173 = POP
 7040   { 2225,	2,	1,	4,	1028,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #2225 = RDPGPR_MMR6
 7123   { 2308,	2,	0,	4,	857,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #2308 = SDIV
 7124   { 2309,	2,	0,	4,	877,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #2309 = SDIV_MM
 7129   { 2314,	2,	1,	4,	497,	0, 0x1ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #2314 = SEB
 7131   { 2316,	2,	1,	4,	750,	0, 0x1ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #2316 = SEB_MM
 7132   { 2317,	2,	1,	4,	498,	0, 0x1ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #2317 = SEH
 7134   { 2319,	2,	1,	4,	751,	0, 0x1ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #2319 = SEH_MM
 7495   { 2680,	2,	0,	4,	858,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #2680 = UDIV
 7496   { 2681,	2,	0,	4,	878,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #2681 = UDIV_MM
 7509   { 2694,	2,	1,	4,	1029,	0, 0x6ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #2694 = WRPGPR_MMR6
 7510   { 2695,	2,	1,	4,	476,	0, 0x1ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #2695 = WSBH
 7511   { 2696,	2,	1,	4,	763,	0, 0x1ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #2696 = WSBH_MM
 7512   { 2697,	2,	1,	4,	795,	0, 0x6ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #2697 = WSBH_MMR6
 7526   { 2711,	2,	1,	4,	1057,	0|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #2711 = YIELD