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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Mips/MipsGenInstrInfo.inc 5192 { 377, 2, 1, 4, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #377 = LoadImm32
5196 { 381, 2, 1, 4, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #381 = LoadImmDoubleGPR
5198 { 383, 2, 1, 4, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #383 = LoadImmSingleGPR
5408 { 593, 2, 1, 4, 717, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #593 = ADDIUPC
5410 { 595, 2, 1, 4, 766, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #595 = ADDIUPC_MMR6
5483 { 668, 2, 1, 4, 719, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #668 = ALUIPC
5484 { 669, 2, 1, 4, 771, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #669 = ALUIPC_MMR6
5510 { 695, 2, 1, 4, 721, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #695 = AUIPC
5511 { 696, 2, 1, 4, 774, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #696 = AUIPC_MMR6
6414 { 1599, 2, 0, 4, 1082, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #1599 = GINVT
6415 { 1600, 2, 0, 4, 1136, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #1600 = GINVT_MMR6
6476 { 1661, 2, 0, 4, 920, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, ImplicitList3, OperandInfo103, -1 ,nullptr }, // Inst #1661 = JIALC
6478 { 1663, 2, 0, 4, 996, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, ImplicitList3, OperandInfo103, -1 ,nullptr }, // Inst #1663 = JIALC_MMR6
6479 { 1664, 2, 0, 4, 925, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, ImplicitList2, OperandInfo103, -1 ,nullptr }, // Inst #1664 = JIC
6481 { 1666, 2, 0, 4, 984, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, ImplicitList2, OperandInfo103, -1 ,nullptr }, // Inst #1666 = JIC_MMR6
6569 { 1754, 2, 1, 4, 783, 0|(1ULL<<MCID::Rematerializable), 0x2ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #1754 = LUI_MMR6
6573 { 1758, 2, 1, 4, 360, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x2ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #1758 = LUi
6575 { 1760, 2, 1, 4, 741, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x2ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #1760 = LUi_MM
6598 { 1783, 2, 1, 4, 442, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #1783 = LWPC
6599 { 1784, 2, 1, 4, 1143, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #1784 = LWPC_MMR6
6607 { 1792, 2, 1, 4, 1176, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #1792 = LWUPC
7034 { 2219, 2, 1, 4, 1417, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::MayLoad), 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #2219 = RDDSP
7035 { 2220, 2, 1, 4, 1583, 0|(1ULL<<MCID::MayLoad), 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #2220 = RDDSP_MM
7437 { 2622, 2, 0, 4, 387, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #2622 = TEQI
7438 { 2623, 2, 0, 4, 961, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #2623 = TEQI_MM
7441 { 2626, 2, 0, 4, 389, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #2626 = TGEI
7442 { 2627, 2, 0, 4, 390, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #2627 = TGEIU
7443 { 2628, 2, 0, 4, 963, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #2628 = TGEIU_MM
7444 { 2629, 2, 0, 4, 964, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #2629 = TGEI_MM
7473 { 2658, 2, 0, 4, 393, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #2658 = TLTI
7474 { 2659, 2, 0, 4, 967, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #2659 = TLTIU_MM
7475 { 2660, 2, 0, 4, 968, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #2660 = TLTI_MM
7480 { 2665, 2, 0, 4, 396, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #2665 = TNEI
7481 { 2666, 2, 0, 4, 971, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #2666 = TNEI_MM
7494 { 2679, 2, 0, 4, 398, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x16ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #2679 = TTLTIU
7507 { 2692, 2, 0, 4, 1445, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #2692 = WRDSP
7508 { 2693, 2, 0, 4, 1611, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #2693 = WRDSP_MM