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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Mips/MipsGenInstrInfo.inc 5191 { 376, 3, 1, 4, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #376 = LoadAddrReg64
6502 { 1687, 3, 1, 4, 1158, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #1687 = LB64
6512 { 1697, 3, 1, 4, 1159, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #1697 = LBu64
6516 { 1701, 3, 1, 4, 1155, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #1701 = LD
6539 { 1724, 3, 1, 4, 832, 0, 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #1724 = LEA_ADDiu64
6542 { 1727, 3, 1, 4, 1160, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #1727 = LH64
6550 { 1735, 3, 1, 4, 1161, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #1735 = LHu64
6559 { 1744, 3, 1, 4, 1156, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #1744 = LLD
6560 { 1745, 3, 1, 4, 1178, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #1745 = LLD_R6
6578 { 1763, 3, 1, 4, 1162, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #1763 = LW64
6616 { 1801, 3, 1, 4, 1157, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #1801 = LWu
7093 { 2278, 3, 0, 4, 1169, 0|(1ULL<<MCID::MayStore), 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #2278 = SB64
7108 { 2293, 3, 0, 4, 1167, 0|(1ULL<<MCID::MayStore), 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #2293 = SD
7125 { 2310, 3, 0, 4, 1174, 0|(1ULL<<MCID::MayStore), 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #2310 = SDL
7126 { 2311, 3, 0, 4, 1175, 0|(1ULL<<MCID::MayStore), 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #2311 = SDR
7158 { 2343, 3, 0, 4, 1170, 0|(1ULL<<MCID::MayStore), 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #2343 = SH64
7376 { 2561, 3, 0, 4, 1171, 0|(1ULL<<MCID::MayStore), 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #2561 = SW64
7388 { 2573, 3, 0, 4, 1172, 0|(1ULL<<MCID::MayStore), 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #2573 = SWL64
7397 { 2582, 3, 0, 4, 1173, 0|(1ULL<<MCID::MayStore), 0x2ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #2582 = SWR64