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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Mips/MipsGenAsmMatcher.inc 7306 { 7195 /* nor */, Mips::NOR, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__GPR32AsmReg1_2, AMFBS_HasStdEnc_NotInMicroMips, { MCK_GPR32AsmReg, MCK_GPR32AsmReg, MCK_GPR32AsmReg }, },
7313 { 7212 /* not */, Mips::NOR, Convert__GPR32AsmReg1_0__GPR32AsmReg1_0__regZERO, AMFBS_HasStdEnc_NotInMicroMips, { MCK_GPR32AsmReg }, },
7317 { 7212 /* not */, Mips::NOR, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__regZERO, AMFBS_HasStdEnc_NotInMicroMips, { MCK_GPR32AsmReg, MCK_GPR32AsmReg }, },
gen/lib/Target/Mips/MipsGenDAGISel.inc10862 /* 20321*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::NOR), 0,
10900 /* 20400*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::NOR), 0,
17299 /* 32308*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::NOR), 0,
17309 /* 32332*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::NOR), 0,
17319 /* 32356*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::NOR), 0,
17329 /* 32380*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::NOR), 0,
17552 /* 32821*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::NOR), 0,
17562 /* 32845*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::NOR), 0,
17572 /* 32869*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::NOR), 0,
17582 /* 32893*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::NOR), 0,
gen/lib/Target/Mips/MipsGenGlobalISel.inc 2504 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::NOR,
2589 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::NOR,
15126 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::NOR,
15146 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::NOR,
15166 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::NOR,
15193 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::NOR,
15213 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::NOR,
15233 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::NOR,
gen/lib/Target/Mips/MipsGenInstrInfo.inc16662 { Mips::NOR, Mips::NOR, Mips::NOR_MM },
16662 { Mips::NOR, Mips::NOR, Mips::NOR_MM },
16799 { Mips::NOR, Mips::NOR, Mips::NOR_MMR6 },
16799 { Mips::NOR, Mips::NOR, Mips::NOR_MMR6 },
gen/lib/Target/Mips/MipsGenMCCodeEmitter.inc 5016 case Mips::NOR:
lib/Target/Mips/AsmParser/MipsAsmParser.cpp 4563 FinalOpcode = Mips::NOR;
lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp 253 case Mips::NOR:
lib/Target/Mips/MipsExpandPseudo.cpp 412 BuildMI(loopMBB, DL, TII->get(Mips::NOR), BinOpRes)
545 NOR = Mips::NOR;
lib/Target/Mips/MipsISelLowering.cpp 1688 BuildMI(BB, DL, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask);
1869 BuildMI(BB, DL, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask);