reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/Mips/MipsGenAsmMatcher.inc

 6976   { 6059 /* mfc1 */, Mips::MFC1, Convert__GPR32AsmReg1_0__FGR32AsmReg1_1, AMFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, { MCK_GPR32AsmReg, MCK_FGR32AsmReg }, },

gen/lib/Target/Mips/MipsGenDAGISel.inc

24666 /* 46192*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::MFC1), 0,

gen/lib/Target/Mips/MipsGenFastISel.inc

   89     return fastEmitInst_r(Mips::MFC1, &Mips::GPR32RegClass, Op0, Op0IsKill);

gen/lib/Target/Mips/MipsGenGlobalISel.inc

 2845       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/Mips::MFC1,

gen/lib/Target/Mips/MipsGenInstrInfo.inc

16627   { Mips::MFC1, Mips::MFC1, Mips::MFC1_MM },
16627   { Mips::MFC1, Mips::MFC1, Mips::MFC1_MM },
16796   { Mips::MFC1, Mips::MFC1, Mips::MFC1_MMR6 },
16796   { Mips::MFC1, Mips::MFC1, Mips::MFC1_MMR6 },

gen/lib/Target/Mips/MipsGenMCCodeEmitter.inc

 6626     case Mips::MFC1:

lib/Target/Mips/MipsAsmPrinter.cpp

  917   unsigned MovOpc = ToFP ? Mips::MTC1 : Mips::MFC1;
  950   unsigned MovOpc = Mips::MFC1;

lib/Target/Mips/MipsCallLowering.cpp

  275     MIRBuilder.buildInstr(Mips::MFC1)

lib/Target/Mips/MipsFastISel.cpp

 1133   emitInst(Mips::MFC1, DestReg).addReg(TempReg);

lib/Target/Mips/MipsInstructionSelector.cpp

  542     MachineInstr *Move = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::MFC1))

lib/Target/Mips/MipsRegisterBankInfo.cpp

  134   case Mips::MFC1:

lib/Target/Mips/MipsSEISelLowering.cpp

 3672                          : (IsFGR64onMips32 ? Mips::MFC1_D64 : Mips::MFC1);

lib/Target/Mips/MipsSEInstrInfo.cpp

   99       Opc = Mips::MFC1;
  812     BuildMI(MBB, I, dl, get(Mips::MFC1), DstReg).addReg(SubReg);