reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/Mips/MipsGenAsmMatcher.inc

 6786   { 5411 /* l.d */, Mips::LDC1, Convert__AFGR64AsmReg1_0__MemOffsetSimm162_1, AMFBS_HasStdEnc_NotFP64bit_HasMips2_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_MemOffsetSimm16 }, },
 6812   { 5477 /* ldc1 */, Mips::LDC1, Convert__AFGR64AsmReg1_0__MemOffsetSimm162_1, AMFBS_HasStdEnc_NotFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, { MCK_AFGR64AsmReg, MCK_MemOffsetSimm16 }, },

gen/lib/Target/Mips/MipsGenDAGISel.inc

 1157 /*  2045*/            OPC_MorphNodeTo1, TARGET_VAL(Mips::LDC1), 0|OPFL_Chain|OPFL_MemRefs,
 1266 /*  2242*/          OPC_MorphNodeTo1, TARGET_VAL(Mips::LDC1), 0|OPFL_Chain|OPFL_MemRefs,

gen/lib/Target/Mips/MipsGenInstrInfo.inc

16605   { Mips::LDC1, Mips::LDC1, Mips::LDC1_MM },
16605   { Mips::LDC1, Mips::LDC1, Mips::LDC1_MM },
16791   { Mips::LDC1, Mips::LDC1, (uint16_t)-1U },
16791   { Mips::LDC1, Mips::LDC1, (uint16_t)-1U },

gen/lib/Target/Mips/MipsGenMCCodeEmitter.inc

 6551     case Mips::LDC1:

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

 3479   TOut.emitRRX(Is64FPU ? Mips::LDC164 : Mips::LDC1, FirstReg, TmpReg,

lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp

  226   case Mips::LDC1:

lib/Target/Mips/MipsFastISel.cpp

  786     Opc = Mips::LDC1;

lib/Target/Mips/MipsInstructionSelector.cpp

  207         return isStore ? Mips::SDC1 : Mips::LDC1;

lib/Target/Mips/MipsSEInstrInfo.cpp

   50       (Opc == Mips::LWC1) || (Opc == Mips::LDC1) || (Opc == Mips::LDC164)) {
  352     Opc = Mips::LDC1;