|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/Mips/MipsGenAsmMatcher.inc 6472 { 3866 /* dsll */, Mips::DSLLV, Convert__GPR64AsmReg1_0__GPR64AsmReg1_0__GPR32AsmReg1_1, AMFBS_HasStdEnc_HasMips3_NotInMicroMips, { MCK_GPR64AsmReg, MCK_GPR32AsmReg }, },
6474 { 3866 /* dsll */, Mips::DSLLV, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__GPR32AsmReg1_2, AMFBS_HasStdEnc_HasMips3_NotInMicroMips, { MCK_GPR64AsmReg, MCK_GPR64AsmReg, MCK_GPR32AsmReg }, },
6478 { 3878 /* dsllv */, Mips::DSLLV, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__GPR32AsmReg1_2, AMFBS_HasStdEnc_HasMips3_NotInMicroMips, { MCK_GPR64AsmReg, MCK_GPR64AsmReg, MCK_GPR32AsmReg }, },
gen/lib/Target/Mips/MipsGenDAGISel.inc19633 /* 36687*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::DSLLV), 0,
19662 /* 36741*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::DSLLV), 0,
gen/lib/Target/Mips/MipsGenGlobalISel.inc13024 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::DSLLV,
13037 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/Mips::DSLLV,
gen/lib/Target/Mips/MipsGenMCCodeEmitter.inc 5229 case Mips::DSLLV:
lib/Target/Mips/AsmParser/MipsAsmParser.cpp 4791 SecondShift = Mips::DSLLV;
4794 FirstShift = Mips::DSLLV;