reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/Mips/MipsGenAsmMatcher.inc

 6473   { 3866 /* dsll */, Mips::DSLL, Convert__GPR64AsmReg1_0__GPR64AsmReg1_0__ConstantUImm6_01_1, AMFBS_HasStdEnc_HasMips3_NotInMicroMips, { MCK_GPR64AsmReg, MCK_ConstantUImm6_0 }, },
 6475   { 3866 /* dsll */, Mips::DSLL, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__ConstantUImm6_01_2, AMFBS_HasStdEnc_HasMips3_NotInMicroMips, { MCK_GPR64AsmReg, MCK_GPR64AsmReg, MCK_ConstantUImm6_0 }, },

gen/lib/Target/Mips/MipsGenDAGISel.inc

19587 /* 36600*/        OPC_MorphNodeTo1, TARGET_VAL(Mips::DSLL), 0,
23583 /* 44264*/      OPC_MorphNodeTo1, TARGET_VAL(Mips::DSLL), 0,
23623 /* 44358*/      OPC_EmitNode1, TARGET_VAL(Mips::DSLL), 0,

gen/lib/Target/Mips/MipsGenFastISel.inc

 3735     return fastEmitInst_ri(Mips::DSLL, &Mips::GPR64RegClass, Op0, Op0IsKill, imm1);

gen/lib/Target/Mips/MipsGenGlobalISel.inc

13001         GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::DSLL,

gen/lib/Target/Mips/MipsGenMCCodeEmitter.inc

 5294     case Mips::DSLL:

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

 2704       TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, 16, IDLoc, STI);
 2733     TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, ShiftAmount, IDLoc, STI);
 3035       TOut.emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, STI);
 3038       TOut.emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, STI);
 3084       TOut.emitRRI(Mips::DSLL, DstReg, DstReg, 16, IDLoc, STI);
 3087       TOut.emitRRI(Mips::DSLL, DstReg, DstReg, 16, IDLoc, STI);
 3250       TOut.emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, STI);
 3253       TOut.emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, STI);
 4866         FirstShift = Mips::DSLL;
 4889         SecondShift = Mips::DSLL;

lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp

   76   case Mips::DSLL:
  164   case Mips::DSLL:

lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp

  277   emitRRI(Mips::DSLL, DstReg, SrcReg, ShiftAmount, IDLoc, STI);

lib/Target/Mips/MipsAnalyzeImmediate.cpp

  141     SLL = Mips::DSLL;

lib/Target/Mips/MipsBranchExpansion.cpp

  591       BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64)
  683         BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64)
  690         BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64)

lib/Target/Mips/MipsSEISelLowering.cpp

 3341   unsigned ShiftOp = Subtarget.isABI_N64() ? Mips::DSLL : Mips::SLL;