reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/Mips/MipsGenAsmMatcher.inc

 6375   { 3373 /* dmtc1 */, Mips::DMTC1, Convert__FGR64AsmReg1_1__GPR64AsmReg1_0, AMFBS_HasStdEnc_HasMips3_IsNotSoftFloat_NotInMicroMips, { MCK_GPR64AsmReg, MCK_FGR64AsmReg }, },

gen/lib/Target/Mips/MipsGenDAGISel.inc

24781 /* 46411*/      OPC_MorphNodeTo1, TARGET_VAL(Mips::DMTC1), 0,
27306 /* 51678*/        OPC_MorphNodeTo1, TARGET_VAL(Mips::DMTC1), 0,
27345 /* 51762*/        OPC_EmitNode1, TARGET_VAL(Mips::DMTC1), 0,

gen/lib/Target/Mips/MipsGenFastISel.inc

   74     return fastEmitInst_r(Mips::DMTC1, &Mips::FGR64RegClass, Op0, Op0IsKill);

gen/lib/Target/Mips/MipsGenGlobalISel.inc

 2958         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/Mips::DMTC1,

gen/lib/Target/Mips/MipsGenMCCodeEmitter.inc

 7609     case Mips::DMTC1:

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

 3439       TOut.emitRR(Mips::DMTC1, FirstReg, TmpReg, IDLoc, STI);

lib/Target/Mips/MipsSEISelDAGToDAG.cpp

  774                     CurDAG->getMachineNode(Mips::DMTC1, DL, MVT::f64, Zero));

lib/Target/Mips/MipsSEISelLowering.cpp

 3775                          ? Mips::DMTC1

lib/Target/Mips/MipsSEInstrInfo.cpp

  165       Opc = Mips::DMTC1;
  460     expandCvtFPInt(MBB, MI, Mips::CVT_S_L, Mips::DMTC1, true);
  467     expandCvtFPInt(MBB, MI, Mips::CVT_D64_L, Mips::DMTC1, true);